OpenCV  5.0.0-pre
Open Source Computer Vision
Modules | Classes | Macros | Typedefs | Enumerations | Functions | Variables

Modules

 Private implementation helpers
 

Classes

struct  cv::v_reg< _Tp, n >
 
struct  simd512::VTraits< T >
 

Macros

#define OPENCV_HAL_WRAP_BIN_OP_ADDSUB(_Tpvec)
 
#define OPENCV_HAL_WRAP_BIN_OP_LOGIC(_Tpvec)
 
#define OPENCV_HAL_WRAP_BIN_OP_MUL(_Tpvec)
 
#define OPENCV_HAL_WRAP_BROADCAST(_Tpvec)
 
#define OPENCV_HAL_WRAP_CMP(_Tpvec)
 
#define OPENCV_HAL_WRAP_CMP_OP(_Tpvec, intrin, op)
 
#define OPENCV_HAL_WRAP_EXTRACT(_Tpvec, _Tp, vl)
 
#define OPENCV_HAL_WRAP_GRT0_INT(_Tpvec, _Tp)
 

Typedefs

typedef v_float32x16 simd512::v_float32
 Maximum available vector register capacity 32-bit floating point values (single precision) More...
 
typedef v_reg< float, 16 > cv::v_float32x16
 Sixteen 32-bit floating point values (single precision) More...
 
typedef v_reg< float, 4 > cv::v_float32x4
 Four 32-bit floating point values (single precision) More...
 
typedef v_reg< float, 8 > cv::v_float32x8
 Eight 32-bit floating point values (single precision) More...
 
typedef v_float64x8 simd512::v_float64
 Maximum available vector register capacity 64-bit floating point values (double precision) More...
 
typedef v_reg< double, 2 > cv::v_float64x2
 Two 64-bit floating point values (double precision) More...
 
typedef v_reg< double, 4 > cv::v_float64x4
 Four 64-bit floating point values (double precision) More...
 
typedef v_reg< double, 8 > cv::v_float64x8
 Eight 64-bit floating point values (double precision) More...
 
typedef v_int16x32 simd512::v_int16
 Maximum available vector register capacity 16-bit signed integer values. More...
 
typedef v_reg< short, 16 > cv::v_int16x16
 Sixteen 16-bit signed integer values. More...
 
typedef v_reg< short, 32 > cv::v_int16x32
 Thirty two 16-bit signed integer values. More...
 
typedef v_reg< short, 8 > cv::v_int16x8
 Eight 16-bit signed integer values. More...
 
typedef v_int32x16 simd512::v_int32
 Maximum available vector register capacity 32-bit signed integer values. More...
 
typedef v_reg< int, 16 > cv::v_int32x16
 Sixteen 32-bit signed integer values. More...
 
typedef v_reg< int, 4 > cv::v_int32x4
 Four 32-bit signed integer values. More...
 
typedef v_reg< int, 8 > cv::v_int32x8
 Eight 32-bit signed integer values. More...
 
typedef v_int64x8 simd512::v_int64
 Maximum available vector register capacity 64-bit signed integer values. More...
 
typedef v_reg< int64, 2 > cv::v_int64x2
 Two 64-bit signed integer values. More...
 
typedef v_reg< int64, 4 > cv::v_int64x4
 Four 64-bit signed integer values. More...
 
typedef v_reg< int64, 8 > cv::v_int64x8
 Eight 64-bit signed integer values. More...
 
typedef v_int8x64 simd512::v_int8
 Maximum available vector register capacity 8-bit signed integer values. More...
 
typedef v_reg< schar, 16 > cv::v_int8x16
 Sixteen 8-bit signed integer values. More...
 
typedef v_reg< schar, 32 > cv::v_int8x32
 Thirty two 8-bit signed integer values. More...
 
typedef v_reg< schar, 64 > cv::v_int8x64
 Sixty four 8-bit signed integer values. More...
 
typedef v_uint16x32 simd512::v_uint16
 Maximum available vector register capacity 16-bit unsigned integer values. More...
 
typedef v_reg< ushort, 16 > cv::v_uint16x16
 Sixteen 16-bit unsigned integer values. More...
 
typedef v_reg< ushort, 32 > cv::v_uint16x32
 Thirty two 16-bit unsigned integer values. More...
 
typedef v_reg< ushort, 8 > cv::v_uint16x8
 Eight 16-bit unsigned integer values. More...
 
typedef v_uint32x16 simd512::v_uint32
 Maximum available vector register capacity 32-bit unsigned integer values. More...
 
typedef v_reg< unsigned, 16 > cv::v_uint32x16
 Sixteen 32-bit unsigned integer values. More...
 
typedef v_reg< unsigned, 4 > cv::v_uint32x4
 Four 32-bit unsigned integer values. More...
 
typedef v_reg< unsigned, 8 > cv::v_uint32x8
 Eight 32-bit unsigned integer values. More...
 
typedef v_uint64x8 simd512::v_uint64
 Maximum available vector register capacity 64-bit unsigned integer values. More...
 
typedef v_reg< uint64, 2 > cv::v_uint64x2
 Two 64-bit unsigned integer values. More...
 
typedef v_reg< uint64, 4 > cv::v_uint64x4
 Four 64-bit unsigned integer values. More...
 
typedef v_reg< uint64, 8 > cv::v_uint64x8
 Eight 64-bit unsigned integer values. More...
 
typedef v_uint8x64 simd512::v_uint8
 Maximum available vector register capacity 8-bit unsigned integer values. More...
 
typedef v_reg< uchar, 16 > cv::v_uint8x16
 Sixteen 8-bit unsigned integer values. More...
 
typedef v_reg< uchar, 32 > cv::v_uint8x32
 Thirty two 8-bit unsigned integer values. More...
 
typedef v_reg< uchar, 64 > cv::v_uint8x64
 Sixty four 8-bit unsigned integer values. More...
 

Enumerations

enum  {
  cv::simd128_width = 16,
  cv::simd256_width = 32,
  cv::simd512_width = 64,
  cv::simdmax_width = simd512_width
}
 

Functions

template<typename _Tp , int n>
v_reg< _Tp, n > cv::operator & (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Bitwise AND. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > & cv::operator &= (v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::operator!= (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Not equal comparison. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::operator* (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Multiply values. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > & cv::operator*= (v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::operator+ (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Add values. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > & cv::operator+= (v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::operator- (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Subtract values. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > & cv::operator-= (v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::operator/ (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Divide values. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > & cv::operator/= (v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::operator< (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Less-than comparison. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::operator<< (const v_reg< _Tp, n > &a, int imm)
 Bitwise shift left. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::operator<= (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Less-than or equal comparison. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::operator== (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Equal comparison. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::operator> (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Greater-than comparison. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::operator>= (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Greater-than or equal comparison. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::operator>> (const v_reg< _Tp, n > &a, int imm)
 Bitwise shift right. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::operator^ (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Bitwise XOR. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > & cv::operator^= (v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::operator| (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Bitwise OR. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > & cv::operator|= (v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::operator~ (const v_reg< _Tp, n > &a)
 Bitwise NOT. More...
 
void cv::v256_cleanup ()
 
template<typename _Tp >
v_reg< _Tp, simd256_width/sizeof(_Tp)> cv::v256_load (const _Tp *ptr)
 Load 256-bit length register contents from memory. More...
 
template<typename _Tp >
v_reg< _Tp, simd256_width/sizeof(_Tp)> cv::v256_load_aligned (const _Tp *ptr)
 Load register contents from memory (aligned) More...
 
template<typename _Tp >
v_reg< typename V_TypeTraits< _Tp >::w_type, simd256_width/sizeof(typename V_TypeTraits< _Tp >::w_type)> cv::v256_load_expand (const _Tp *ptr)
 Load register contents from memory with double expand. More...
 
v_reg< float, simd256_width/sizeof(float)> cv::v256_load_expand (const float16_t *ptr)
 
template<typename _Tp >
v_reg< typename V_TypeTraits< _Tp >::q_type, simd256_width/sizeof(typename V_TypeTraits< _Tp >::q_type)> cv::v256_load_expand_q (const _Tp *ptr)
 Load register contents from memory with quad expand. More...
 
template<typename _Tp >
v_reg< _Tp, simd256_width/sizeof(_Tp)> cv::v256_load_halves (const _Tp *loptr, const _Tp *hiptr)
 Load register contents from two memory blocks. More...
 
template<typename _Tp >
v_reg< _Tp, simd256_width/sizeof(_Tp)> cv::v256_load_low (const _Tp *ptr)
 Load 128-bits of data to lower part (high part is undefined). More...
 
void cv::v512_cleanup ()
 
template<typename _Tp >
v_reg< _Tp, simd512_width/sizeof(_Tp)> cv::v512_load (const _Tp *ptr)
 Load 512-bit length register contents from memory. More...
 
template<typename _Tp >
v_reg< _Tp, simd512_width/sizeof(_Tp)> cv::v512_load_aligned (const _Tp *ptr)
 Load register contents from memory (aligned) More...
 
template<typename _Tp >
v_reg< typename V_TypeTraits< _Tp >::w_type, simd512_width/sizeof(typename V_TypeTraits< _Tp >::w_type)> cv::v512_load_expand (const _Tp *ptr)
 Load register contents from memory with double expand. More...
 
v_reg< float, simd512_width/sizeof(float)> cv::v512_load_expand (const float16_t *ptr)
 
template<typename _Tp >
v_reg< typename V_TypeTraits< _Tp >::q_type, simd512_width/sizeof(typename V_TypeTraits< _Tp >::q_type)> cv::v512_load_expand_q (const _Tp *ptr)
 Load register contents from memory with quad expand. More...
 
template<typename _Tp >
v_reg< _Tp, simd512_width/sizeof(_Tp)> cv::v512_load_halves (const _Tp *loptr, const _Tp *hiptr)
 Load register contents from two memory blocks. More...
 
template<typename _Tp >
v_reg< _Tp, simd512_width/sizeof(_Tp)> cv::v512_load_low (const _Tp *ptr)
 Load 256-bits of data to lower part (high part is undefined). More...
 
template<typename _Tp , int n>
v_reg< typename V_TypeTraits< _Tp >::abs_type, n > cv::v_abs (const v_reg< _Tp, n > &a)
 Absolute value of elements. More...
 
template<typename _Tp , int n>
v_reg< typename V_TypeTraits< _Tp >::abs_type, n > cv::v_absdiff (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Absolute difference. More...
 
template<int n>
v_reg< float, n > cv::v_absdiff (const v_reg< float, n > &a, const v_reg< float, n > &b)
 
template<int n>
v_reg< double, n > cv::v_absdiff (const v_reg< double, n > &a, const v_reg< double, n > &b)
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_absdiffs (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Saturating absolute difference. More...
 
template<typename... Args>
v_uint8 simd512::v_add (const v_uint8 &f1, const v_uint8 &f2, const Args &... vf)
 
v_uint8 simd512::v_add (const v_uint8 &a, const v_uint8 &b)
 
v_uint16 simd512::v_add (const v_uint16 &a, const v_uint16 &b)
 
template<typename... Args>
v_uint16 simd512::v_add (const v_uint16 &f1, const v_uint16 &f2, const Args &... vf)
 
v_uint32 simd512::v_add (const v_uint32 &a, const v_uint32 &b)
 
template<typename... Args>
v_uint32 simd512::v_add (const v_uint32 &f1, const v_uint32 &f2, const Args &... vf)
 
v_uint64 simd512::v_add (const v_uint64 &a, const v_uint64 &b)
 
template<typename... Args>
v_uint64 simd512::v_add (const v_uint64 &f1, const v_uint64 &f2, const Args &... vf)
 
template<typename... Args>
v_int8 simd512::v_add (const v_int8 &f1, const v_int8 &f2, const Args &... vf)
 
v_int8 simd512::v_add (const v_int8 &a, const v_int8 &b)
 
v_int16 simd512::v_add (const v_int16 &a, const v_int16 &b)
 
template<typename... Args>
v_int16 simd512::v_add (const v_int16 &f1, const v_int16 &f2, const Args &... vf)
 
v_int32 simd512::v_add (const v_int32 &a, const v_int32 &b)
 
template<typename... Args>
v_int32 simd512::v_add (const v_int32 &f1, const v_int32 &f2, const Args &... vf)
 
v_int64 simd512::v_add (const v_int64 &a, const v_int64 &b)
 
template<typename... Args>
v_int64 simd512::v_add (const v_int64 &f1, const v_int64 &f2, const Args &... vf)
 
v_float32 simd512::v_add (const v_float32 &a, const v_float32 &b)
 
template<typename... Args>
v_float32 simd512::v_add (const v_float32 &f1, const v_float32 &f2, const Args &... vf)
 
v_float64 simd512::v_add (const v_float64 &a, const v_float64 &b)
 
template<typename... Args>
v_float64 simd512::v_add (const v_float64 &f1, const v_float64 &f2, const Args &... vf)
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_add_wrap (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Add values without saturation. More...
 
v_uint8 simd512::v_and (const v_uint8 &a, const v_uint8 &b)
 
v_uint16 simd512::v_and (const v_uint16 &a, const v_uint16 &b)
 
v_uint32 simd512::v_and (const v_uint32 &a, const v_uint32 &b)
 
v_uint64 simd512::v_and (const v_uint64 &a, const v_uint64 &b)
 
v_int8 simd512::v_and (const v_int8 &a, const v_int8 &b)
 
v_int16 simd512::v_and (const v_int16 &a, const v_int16 &b)
 
v_int32 simd512::v_and (const v_int32 &a, const v_int32 &b)
 
v_int64 simd512::v_and (const v_int64 &a, const v_int64 &b)
 
template<int i, typename _Tp , int n>
v_reg< _Tp, n > cv::v_broadcast_element (const v_reg< _Tp, n > &a)
 Broadcast i-th element of vector. More...
 
v_uint32 simd512::v_broadcast_highest (const v_uint32 &v)
 
v_int32 simd512::v_broadcast_highest (const v_int32 &v)
 
v_float32 simd512::v_broadcast_highest (const v_float32 &v)
 
template<int n>
v_reg< int, n > cv::v_ceil (const v_reg< float, n > &a)
 Ceil elements. More...
 
template<int n>
v_reg< int, n *2 > cv::v_ceil (const v_reg< double, n > &a)
 
template<typename _Tp , int n>
bool cv::v_check_all (const v_reg< _Tp, n > &a)
 Check if all packed values are less than zero. More...
 
template<typename _Tp , int n>
bool cv::v_check_any (const v_reg< _Tp, n > &a)
 Check if any of packed values is less than zero. More...
 
void cv::v_cleanup ()
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_combine_high (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Combine vector from last elements of two vectors. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_combine_low (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Combine vector from first elements of two vectors. More...
 
template<int n>
v_reg< float, n > cv::v_cvt_f32 (const v_reg< int, n > &a)
 Convert to float. More...
 
template<int n>
v_reg< float, n *2 > cv::v_cvt_f32 (const v_reg< double, n > &a)
 Convert lower half to float. More...
 
template<int n>
v_reg< float, n *2 > cv::v_cvt_f32 (const v_reg< double, n > &a, const v_reg< double, n > &b)
 Convert to float. More...
 
template<int n>
v_reg< double, n/2 > cv::v_cvt_f64 (const v_reg< int, n > &a)
 Convert lower half to double. More...
 
template<int n>
v_reg< double,(n/2)> cv::v_cvt_f64 (const v_reg< float, n > &a)
 Convert lower half to double. More...
 
template<int n>
v_reg< double, n > cv::v_cvt_f64 (const v_reg< int64, n > &a)
 Convert to double. More...
 
template<int n>
v_reg< double,(n/2)> cv::v_cvt_f64_high (const v_reg< int, n > &a)
 Convert to double high part of vector. More...
 
template<int n>
v_reg< double,(n/2)> cv::v_cvt_f64_high (const v_reg< float, n > &a)
 Convert to double high part of vector. More...
 
v_float32 simd512::v_div (const v_float32 &a, const v_float32 &b)
 
v_float64 simd512::v_div (const v_float64 &a, const v_float64 &b)
 
template<typename _Tp , int n>
v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > cv::v_dotprod (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Dot product of elements. More...
 
template<typename _Tp , int n>
v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > cv::v_dotprod (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b, const v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > &c)
 Dot product of elements. More...
 
template<typename _Tp , int n>
v_reg< typename V_TypeTraits< _Tp >::q_type, n/4 > cv::v_dotprod_expand (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Dot product of elements and expand. More...
 
template<typename _Tp , int n>
v_reg< typename V_TypeTraits< _Tp >::q_type, n/4 > cv::v_dotprod_expand (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b, const v_reg< typename V_TypeTraits< _Tp >::q_type, n/4 > &c)
 Dot product of elements. More...
 
template<int n>
v_reg< double, n/2 > cv::v_dotprod_expand (const v_reg< int, n > &a, const v_reg< int, n > &b)
 
template<int n>
v_reg< double, n/2 > cv::v_dotprod_expand (const v_reg< int, n > &a, const v_reg< int, n > &b, const v_reg< double, n/2 > &c)
 
template<typename _Tp , int n>
v_reg< typename V_TypeTraits< _Tp >::q_type, n/4 > cv::v_dotprod_expand_fast (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Fast Dot product of elements and expand. More...
 
template<typename _Tp , int n>
v_reg< typename V_TypeTraits< _Tp >::q_type, n/4 > cv::v_dotprod_expand_fast (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b, const v_reg< typename V_TypeTraits< _Tp >::q_type, n/4 > &c)
 Fast Dot product of elements. More...
 
template<int n>
v_reg< double, n/2 > cv::v_dotprod_expand_fast (const v_reg< int, n > &a, const v_reg< int, n > &b)
 
template<int n>
v_reg< double, n/2 > cv::v_dotprod_expand_fast (const v_reg< int, n > &a, const v_reg< int, n > &b, const v_reg< double, n/2 > &c)
 
template<typename _Tp , int n>
v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > cv::v_dotprod_fast (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Fast Dot product of elements. More...
 
template<typename _Tp , int n>
v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > cv::v_dotprod_fast (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b, const v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > &c)
 Fast Dot product of elements. More...
 
v_uint8 simd512::v_eq (const v_uint8 &a, const v_uint8 &b)
 
v_uint16 simd512::v_eq (const v_uint16 &a, const v_uint16 &b)
 
v_uint32 simd512::v_eq (const v_uint32 &a, const v_uint32 &b)
 
v_int8 simd512::v_eq (const v_int8 &a, const v_int8 &b)
 
v_int16 simd512::v_eq (const v_int16 &a, const v_int16 &b)
 
v_int32 simd512::v_eq (const v_int32 &a, const v_int32 &b)
 
v_float32 simd512::v_eq (const v_float32 &a, const v_float32 &b)
 
v_float64 simd512::v_eq (const v_float64 &a, const v_float64 &b)
 
template<typename _Tp , int n>
void cv::v_expand (const v_reg< _Tp, n > &a, v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > &b0, v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > &b1)
 Expand values to the wider pack type. More...
 
template<typename _Tp , int n>
v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > cv::v_expand_high (const v_reg< _Tp, n > &a)
 Expand higher values to the wider pack type. More...
 
template<typename _Tp , int n>
v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > cv::v_expand_low (const v_reg< _Tp, n > &a)
 Expand lower values to the wider pack type. More...
 
template<int s, typename _Tp , int n>
v_reg< _Tp, n > cv::v_extract (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Vector extract. More...
 
uchar simd512::v_extract_highest (const v_uint8 &v)
 
schar simd512::v_extract_highest (const v_int8 &v)
 
ushort simd512::v_extract_highest (const v_uint16 &v)
 
short simd512::v_extract_highest (const v_int16 &v)
 
unsigned int simd512::v_extract_highest (const v_uint32 &v)
 
int simd512::v_extract_highest (const v_int32 &v)
 
uint64 simd512::v_extract_highest (const v_uint64 &v)
 
int64 simd512::v_extract_highest (const v_int64 &v)
 
float simd512::v_extract_highest (const v_float32 &v)
 
double simd512::v_extract_highest (const v_float64 &v)
 
template<int s, typename _Tp , int n>
_Tp cv::v_extract_n (const v_reg< _Tp, n > &v)
 Vector extract. More...
 
template<int n>
v_reg< int, n > cv::v_floor (const v_reg< float, n > &a)
 Floor elements. More...
 
template<int n>
v_reg< int, n *2 > cv::v_floor (const v_reg< double, n > &a)
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_fma (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b, const v_reg< _Tp, n > &c)
 Multiply and add. More...
 
v_uint8 simd512::v_ge (const v_uint8 &a, const v_uint8 &b)
 
v_uint16 simd512::v_ge (const v_uint16 &a, const v_uint16 &b)
 
v_uint32 simd512::v_ge (const v_uint32 &a, const v_uint32 &b)
 
v_int8 simd512::v_ge (const v_int8 &a, const v_int8 &b)
 
v_int16 simd512::v_ge (const v_int16 &a, const v_int16 &b)
 
v_int32 simd512::v_ge (const v_int32 &a, const v_int32 &b)
 
v_float32 simd512::v_ge (const v_float32 &a, const v_float32 &b)
 
v_float64 simd512::v_ge (const v_float64 &a, const v_float64 &b)
 
uchar simd512::v_get0 (const v_uint8 &v)
 
schar simd512::v_get0 (const v_int8 &v)
 
ushort simd512::v_get0 (const v_uint16 &v)
 
short simd512::v_get0 (const v_int16 &v)
 
unsigned simd512::v_get0 (const v_uint32 &v)
 
int simd512::v_get0 (const v_int32 &v)
 
uint64 simd512::v_get0 (const v_uint64 &v)
 
int64 simd512::v_get0 (const v_int64 &v)
 
float simd512::v_get0 (const v_float32 &v)
 
double simd512::v_get0 (const v_float64 &v)
 
v_uint8 simd512::v_gt (const v_uint8 &a, const v_uint8 &b)
 
v_uint16 simd512::v_gt (const v_uint16 &a, const v_uint16 &b)
 
v_uint32 simd512::v_gt (const v_uint32 &a, const v_uint32 &b)
 
v_int8 simd512::v_gt (const v_int8 &a, const v_int8 &b)
 
v_int16 simd512::v_gt (const v_int16 &a, const v_int16 &b)
 
v_int32 simd512::v_gt (const v_int32 &a, const v_int32 &b)
 
v_float32 simd512::v_gt (const v_float32 &a, const v_float32 &b)
 
v_float64 simd512::v_gt (const v_float64 &a, const v_float64 &b)
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_interleave_pairs (const v_reg< _Tp, n > &vec)
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_interleave_quads (const v_reg< _Tp, n > &vec)
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_invsqrt (const v_reg< _Tp, n > &a)
 Inversed square root. More...
 
v_uint8 simd512::v_le (const v_uint8 &a, const v_uint8 &b)
 
v_uint16 simd512::v_le (const v_uint16 &a, const v_uint16 &b)
 
v_uint32 simd512::v_le (const v_uint32 &a, const v_uint32 &b)
 
v_int8 simd512::v_le (const v_int8 &a, const v_int8 &b)
 
v_int16 simd512::v_le (const v_int16 &a, const v_int16 &b)
 
v_int32 simd512::v_le (const v_int32 &a, const v_int32 &b)
 
v_float32 simd512::v_le (const v_float32 &a, const v_float32 &b)
 
v_float64 simd512::v_le (const v_float64 &a, const v_float64 &b)
 
template<typename _Tp >
v_reg< _Tp, simd128_width/sizeof(_Tp)> cv::v_load (const _Tp *ptr)
 Load register contents from memory. More...
 
template<typename _Tp >
v_reg< _Tp, simd128_width/sizeof(_Tp)> cv::v_load_aligned (const _Tp *ptr)
 Load register contents from memory (aligned) More...
 
template<typename _Tp , int n>
void cv::v_load_deinterleave (const _Tp *ptr, v_reg< _Tp, n > &a, v_reg< _Tp, n > &b)
 Load and deinterleave (2 channels) More...
 
template<typename _Tp , int n>
void cv::v_load_deinterleave (const _Tp *ptr, v_reg< _Tp, n > &a, v_reg< _Tp, n > &b, v_reg< _Tp, n > &c)
 Load and deinterleave (3 channels) More...
 
template<typename _Tp , int n>
void cv::v_load_deinterleave (const _Tp *ptr, v_reg< _Tp, n > &a, v_reg< _Tp, n > &b, v_reg< _Tp, n > &c, v_reg< _Tp, n > &d)
 Load and deinterleave (4 channels) More...
 
template<typename _Tp >
v_reg< typename V_TypeTraits< _Tp >::w_type, simd128_width/sizeof(typename V_TypeTraits< _Tp >::w_type)> cv::v_load_expand (const _Tp *ptr)
 Load register contents from memory with double expand. More...
 
v_reg< float, simd128_width/sizeof(float)> cv::v_load_expand (const float16_t *ptr)
 
template<typename _Tp >
v_reg< typename V_TypeTraits< _Tp >::q_type, simd128_width/sizeof(typename V_TypeTraits< _Tp >::q_type)> cv::v_load_expand_q (const _Tp *ptr)
 Load register contents from memory with quad expand. More...
 
template<typename _Tp >
v_reg< _Tp, simd128_width/sizeof(_Tp)> cv::v_load_halves (const _Tp *loptr, const _Tp *hiptr)
 Load register contents from two memory blocks. More...
 
template<typename _Tp >
v_reg< _Tp, simd128_width/sizeof(_Tp)> cv::v_load_low (const _Tp *ptr)
 Load 64-bits of data to lower part (high part is undefined). More...
 
v_uint8 simd512::v_lt (const v_uint8 &a, const v_uint8 &b)
 
v_uint16 simd512::v_lt (const v_uint16 &a, const v_uint16 &b)
 
v_uint32 simd512::v_lt (const v_uint32 &a, const v_uint32 &b)
 
v_int8 simd512::v_lt (const v_int8 &a, const v_int8 &b)
 
v_int16 simd512::v_lt (const v_int16 &a, const v_int16 &b)
 
v_int32 simd512::v_lt (const v_int32 &a, const v_int32 &b)
 
v_float32 simd512::v_lt (const v_float32 &a, const v_float32 &b)
 
v_float64 simd512::v_lt (const v_float64 &a, const v_float64 &b)
 
template<typename _Tp >
v_reg< _Tp, simd128_width/sizeof(_Tp)> cv::v_lut (const _Tp *tab, const int *idx)
 
template<int n>
v_reg< int, n > cv::v_lut (const int *tab, const v_reg< int, n > &idx)
 
template<int n>
v_reg< unsigned, n > cv::v_lut (const unsigned *tab, const v_reg< int, n > &idx)
 
template<int n>
v_reg< float, n > cv::v_lut (const float *tab, const v_reg< int, n > &idx)
 
template<int n>
v_reg< double, n/2 > cv::v_lut (const double *tab, const v_reg< int, n > &idx)
 
template<int n>
void cv::v_lut_deinterleave (const float *tab, const v_reg< int, n > &idx, v_reg< float, n > &x, v_reg< float, n > &y)
 
template<int n>
void cv::v_lut_deinterleave (const double *tab, const v_reg< int, n *2 > &idx, v_reg< double, n > &x, v_reg< double, n > &y)
 
template<typename _Tp >
v_reg< _Tp, simd128_width/sizeof(_Tp)> cv::v_lut_pairs (const _Tp *tab, const int *idx)
 
template<typename _Tp >
v_reg< _Tp, simd128_width/sizeof(_Tp)> cv::v_lut_quads (const _Tp *tab, const int *idx)
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_magnitude (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Magnitude. More...
 
template<int n>
v_reg< float, n > cv::v_matmul (const v_reg< float, n > &v, const v_reg< float, n > &a, const v_reg< float, n > &b, const v_reg< float, n > &c, const v_reg< float, n > &d)
 Matrix multiplication. More...
 
template<int n>
v_reg< float, n > cv::v_matmuladd (const v_reg< float, n > &v, const v_reg< float, n > &a, const v_reg< float, n > &b, const v_reg< float, n > &c, const v_reg< float, n > &d)
 Matrix multiplication and add. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_max (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Choose max values for each pair. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_min (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Choose min values for each pair. More...
 
v_uint8 simd512::v_mul (const v_uint8 &a, const v_uint8 &b)
 
template<typename... Args>
v_uint8 simd512::v_mul (const v_uint8 &f1, const v_uint8 &f2, const Args &... vf)
 
template<typename... Args>
v_int8 simd512::v_mul (const v_int8 &f1, const v_int8 &f2, const Args &... vf)
 
v_int8 simd512::v_mul (const v_int8 &a, const v_int8 &b)
 
template<typename... Args>
v_uint16 simd512::v_mul (const v_uint16 &f1, const v_uint16 &f2, const Args &... vf)
 
v_uint16 simd512::v_mul (const v_uint16 &a, const v_uint16 &b)
 
v_uint32 simd512::v_mul (const v_uint32 &a, const v_uint32 &b)
 
template<typename... Args>
v_uint32 simd512::v_mul (const v_uint32 &f1, const v_uint32 &f2, const Args &... vf)
 
template<typename... Args>
v_int16 simd512::v_mul (const v_int16 &f1, const v_int16 &f2, const Args &... vf)
 
v_int16 simd512::v_mul (const v_int16 &a, const v_int16 &b)
 
v_int32 simd512::v_mul (const v_int32 &a, const v_int32 &b)
 
template<typename... Args>
v_int32 simd512::v_mul (const v_int32 &f1, const v_int32 &f2, const Args &... vf)
 
v_float32 simd512::v_mul (const v_float32 &a, const v_float32 &b)
 
template<typename... Args>
v_float32 simd512::v_mul (const v_float32 &f1, const v_float32 &f2, const Args &... vf)
 
v_float64 simd512::v_mul (const v_float64 &a, const v_float64 &b)
 
template<typename... Args>
v_float64 simd512::v_mul (const v_float64 &f1, const v_float64 &f2, const Args &... vf)
 
template<typename _Tp , int n>
void cv::v_mul_expand (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b, v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > &c, v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > &d)
 Multiply and expand. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_mul_hi (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Multiply and extract high part. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_mul_wrap (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Multiply values without saturation. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_muladd (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b, const v_reg< _Tp, n > &c)
 A synonym for v_fma. More...
 
v_uint8 simd512::v_ne (const v_uint8 &a, const v_uint8 &b)
 
v_uint16 simd512::v_ne (const v_uint16 &a, const v_uint16 &b)
 
v_uint32 simd512::v_ne (const v_uint32 &a, const v_uint32 &b)
 
v_int8 simd512::v_ne (const v_int8 &a, const v_int8 &b)
 
v_int16 simd512::v_ne (const v_int16 &a, const v_int16 &b)
 
v_int32 simd512::v_ne (const v_int32 &a, const v_int32 &b)
 
v_float32 simd512::v_ne (const v_float32 &a, const v_float32 &b)
 
v_float64 simd512::v_ne (const v_float64 &a, const v_float64 &b)
 
v_uint8 simd512::v_not (const v_uint8 &a)
 
v_uint16 simd512::v_not (const v_uint16 &a)
 
v_uint32 simd512::v_not (const v_uint32 &a)
 
v_uint64 simd512::v_not (const v_uint64 &a)
 
v_int8 simd512::v_not (const v_int8 &a)
 
v_int16 simd512::v_not (const v_int16 &a)
 
v_int32 simd512::v_not (const v_int32 &a)
 
v_int64 simd512::v_not (const v_int64 &a)
 
template<int n>
v_reg< float, n > cv::v_not_nan (const v_reg< float, n > &a)
 
template<int n>
v_reg< double, n > cv::v_not_nan (const v_reg< double, n > &a)
 
v_uint8 simd512::v_or (const v_uint8 &a, const v_uint8 &b)
 
v_uint16 simd512::v_or (const v_uint16 &a, const v_uint16 &b)
 
v_uint32 simd512::v_or (const v_uint32 &a, const v_uint32 &b)
 
v_uint64 simd512::v_or (const v_uint64 &a, const v_uint64 &b)
 
v_int8 simd512::v_or (const v_int8 &a, const v_int8 &b)
 
v_int16 simd512::v_or (const v_int16 &a, const v_int16 &b)
 
v_int32 simd512::v_or (const v_int32 &a, const v_int32 &b)
 
v_int64 simd512::v_or (const v_int64 &a, const v_int64 &b)
 
template<int n>
void cv::v_pack_store (float16_t *ptr, const v_reg< float, n > &v)
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_pack_triplets (const v_reg< _Tp, n > &vec)
 
template<typename _Tp , int n>
v_reg< typename V_TypeTraits< _Tp >::abs_type, n > cv::v_popcount (const v_reg< _Tp, n > &a)
 Count the 1 bits in the vector lanes and return result as corresponding unsigned type. More...
 
template<typename _Tp , int n>
void cv::v_recombine (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b, v_reg< _Tp, n > &low, v_reg< _Tp, n > &high)
 Combine two vectors from lower and higher parts of two other vectors. More...
 
template<typename _Tp , int n>
_Tp cv::v_reduce_max (const v_reg< _Tp, n > &a)
 Find one max value. More...
 
template<typename _Tp , int n>
_Tp cv::v_reduce_min (const v_reg< _Tp, n > &a)
 Find one min value. More...
 
template<typename _Tp , int n>
V_TypeTraits< typename V_TypeTraits< _Tp >::abs_type >::sum_type cv::v_reduce_sad (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Sum absolute differences of values. More...
 
template<typename _Tp , int n>
V_TypeTraits< _Tp >::sum_type cv::v_reduce_sum (const v_reg< _Tp, n > &a)
 Sum packed values. More...
 
template<int n>
v_reg< float, n > cv::v_reduce_sum4 (const v_reg< float, n > &a, const v_reg< float, n > &b, const v_reg< float, n > &c, const v_reg< float, n > &d)
 Sums all elements of each input vector, returns the vector of sums. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_reverse (const v_reg< _Tp, n > &a)
 Vector reverse order. More...
 
template<int imm, typename _Tp , int n>
v_reg< _Tp, n > cv::v_rotate_left (const v_reg< _Tp, n > &a)
 Element shift left among vector. More...
 
template<int imm, typename _Tp , int n>
v_reg< _Tp, n > cv::v_rotate_left (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 
template<int imm, typename _Tp , int n>
v_reg< _Tp, n > cv::v_rotate_right (const v_reg< _Tp, n > &a)
 Element shift right among vector. More...
 
template<int imm, typename _Tp , int n>
v_reg< _Tp, n > cv::v_rotate_right (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 
template<int n>
v_reg< int, n > cv::v_round (const v_reg< float, n > &a)
 Round elements. More...
 
template<int n>
v_reg< int, n *2 > cv::v_round (const v_reg< double, n > &a, const v_reg< double, n > &b)
 
template<int n>
v_reg< int, n *2 > cv::v_round (const v_reg< double, n > &a)
 
template<typename _Tp , int n>
int cv::v_scan_forward (const v_reg< _Tp, n > &a)
 Get first negative lane index. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_select (const v_reg< _Tp, n > &mask, const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Per-element select (blend operation) More...
 
template<typename _Tp , int n>
int cv::v_signmask (const v_reg< _Tp, n > &a)
 Get negative values mask. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_sqr_magnitude (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Square of the magnitude. More...
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_sqrt (const v_reg< _Tp, n > &a)
 Square root of elements. More...
 
template<typename _Tp , int n>
void cv::v_store (_Tp *ptr, const v_reg< _Tp, n > &a)
 Store data to memory. More...
 
template<typename _Tp , int n>
void cv::v_store (_Tp *ptr, const v_reg< _Tp, n > &a, hal::StoreMode)
 
template<typename _Tp , int n>
void cv::v_store_aligned (_Tp *ptr, const v_reg< _Tp, n > &a)
 Store data to memory (aligned) More...
 
template<typename _Tp , int n>
void cv::v_store_aligned (_Tp *ptr, const v_reg< _Tp, n > &a, hal::StoreMode)
 
template<typename _Tp , int n>
void cv::v_store_aligned_nocache (_Tp *ptr, const v_reg< _Tp, n > &a)
 
template<typename _Tp , int n>
void cv::v_store_high (_Tp *ptr, const v_reg< _Tp, n > &a)
 Store data to memory (higher half) More...
 
template<typename _Tp , int n>
void cv::v_store_interleave (_Tp *ptr, const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b, hal::StoreMode=hal::STORE_UNALIGNED)
 Interleave and store (2 channels) More...
 
template<typename _Tp , int n>
void cv::v_store_interleave (_Tp *ptr, const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b, const v_reg< _Tp, n > &c, hal::StoreMode=hal::STORE_UNALIGNED)
 Interleave and store (3 channels) More...
 
template<typename _Tp , int n>
void cv::v_store_interleave (_Tp *ptr, const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b, const v_reg< _Tp, n > &c, const v_reg< _Tp, n > &d, hal::StoreMode=hal::STORE_UNALIGNED)
 Interleave and store (4 channels) More...
 
template<typename _Tp , int n>
void cv::v_store_low (_Tp *ptr, const v_reg< _Tp, n > &a)
 Store data to memory (lower half) More...
 
v_uint8 simd512::v_sub (const v_uint8 &a, const v_uint8 &b)
 
v_uint16 simd512::v_sub (const v_uint16 &a, const v_uint16 &b)
 
v_uint32 simd512::v_sub (const v_uint32 &a, const v_uint32 &b)
 
v_uint64 simd512::v_sub (const v_uint64 &a, const v_uint64 &b)
 
v_int8 simd512::v_sub (const v_int8 &a, const v_int8 &b)
 
v_int16 simd512::v_sub (const v_int16 &a, const v_int16 &b)
 
v_int32 simd512::v_sub (const v_int32 &a, const v_int32 &b)
 
v_int64 simd512::v_sub (const v_int64 &a, const v_int64 &b)
 
v_float32 simd512::v_sub (const v_float32 &a, const v_float32 &b)
 
v_float64 simd512::v_sub (const v_float64 &a, const v_float64 &b)
 
template<typename _Tp , int n>
v_reg< _Tp, n > cv::v_sub_wrap (const v_reg< _Tp, n > &a, const v_reg< _Tp, n > &b)
 Subtract values without saturation. More...
 
template<typename _Tp , int n>
void cv::v_transpose4x4 (v_reg< _Tp, n > &a0, const v_reg< _Tp, n > &a1, const v_reg< _Tp, n > &a2, const v_reg< _Tp, n > &a3, v_reg< _Tp, n > &b0, v_reg< _Tp, n > &b1, v_reg< _Tp, n > &b2, v_reg< _Tp, n > &b3)
 Transpose 4x4 matrix. More...
 
template<int n>
v_reg< int, n > cv::v_trunc (const v_reg< float, n > &a)
 Truncate elements. More...
 
template<int n>
v_reg< int, n *2 > cv::v_trunc (const v_reg< double, n > &a)
 
v_uint8 simd512::v_xor (const v_uint8 &a, const v_uint8 &b)
 
v_uint16 simd512::v_xor (const v_uint16 &a, const v_uint16 &b)
 
v_uint32 simd512::v_xor (const v_uint32 &a, const v_uint32 &b)
 
v_uint64 simd512::v_xor (const v_uint64 &a, const v_uint64 &b)
 
v_int8 simd512::v_xor (const v_int8 &a, const v_int8 &b)
 
v_int16 simd512::v_xor (const v_int16 &a, const v_int16 &b)
 
v_int32 simd512::v_xor (const v_int32 &a, const v_int32 &b)
 
v_int64 simd512::v_xor (const v_int64 &a, const v_int64 &b)
 
template<typename _Tp , int n>
void cv::v_zip (const v_reg< _Tp, n > &a0, const v_reg< _Tp, n > &a1, v_reg< _Tp, n > &b0, v_reg< _Tp, n > &b1)
 Interleave two vectors. More...
 
void simd512::vx_cleanup ()
 SIMD processing state cleanup call. More...
 

Variables

static const unsigned char cv::popCountTable []
 

Wide init with value

Create maximum available capacity vector with elements set to a specific value

v_uint8 simd512::vx_setall_u8 (uchar v)
 
v_int8 simd512::vx_setall_s8 (schar v)
 
v_uint16 simd512::vx_setall_u16 (ushort v)
 
v_int16 simd512::vx_setall_s16 (short v)
 
v_int32 simd512::vx_setall_s32 (int v)
 
v_uint32 simd512::vx_setall_u32 (unsigned v)
 
v_float32 simd512::vx_setall_f32 (float v)
 
v_int64 simd512::vx_setall_s64 (int64 v)
 
v_uint64 simd512::vx_setall_u64 (uint64 v)
 
v_float64 simd512::vx_setall_f64 (double v)
 

Wide init with zero

Create maximum available capacity vector with elements set to zero

v_uint8 simd512::vx_setzero_u8 ()
 
v_int8 simd512::vx_setzero_s8 ()
 
v_uint16 simd512::vx_setzero_u16 ()
 
v_int16 simd512::vx_setzero_s16 ()
 
v_int32 simd512::vx_setzero_s32 ()
 
v_uint32 simd512::vx_setzero_u32 ()
 
v_float32 simd512::vx_setzero_f32 ()
 
v_int64 simd512::vx_setzero_s64 ()
 
v_uint64 simd512::vx_setzero_u64 ()
 
v_float64 simd512::vx_setzero_f64 ()
 

Wide load from memory

Load maximum available capacity register contents from memory

v_uint8 simd512::vx_load (const uchar *ptr)
 
v_int8 simd512::vx_load (const schar *ptr)
 
v_uint16 simd512::vx_load (const ushort *ptr)
 
v_int16 simd512::vx_load (const short *ptr)
 
v_int32 simd512::vx_load (const int *ptr)
 
v_uint32 simd512::vx_load (const unsigned *ptr)
 
v_float32 simd512::vx_load (const float *ptr)
 
v_int64 simd512::vx_load (const int64 *ptr)
 
v_uint64 simd512::vx_load (const uint64 *ptr)
 
v_float64 simd512::vx_load (const double *ptr)
 

Wide load from memory(aligned)

Load maximum available capacity register contents from memory(aligned)

v_uint8 simd512::vx_load_aligned (const uchar *ptr)
 
v_int8 simd512::vx_load_aligned (const schar *ptr)
 
v_uint16 simd512::vx_load_aligned (const ushort *ptr)
 
v_int16 simd512::vx_load_aligned (const short *ptr)
 
v_int32 simd512::vx_load_aligned (const int *ptr)
 
v_uint32 simd512::vx_load_aligned (const unsigned *ptr)
 
v_float32 simd512::vx_load_aligned (const float *ptr)
 
v_int64 simd512::vx_load_aligned (const int64 *ptr)
 
v_uint64 simd512::vx_load_aligned (const uint64 *ptr)
 
v_float64 simd512::vx_load_aligned (const double *ptr)
 

Wide load lower half from memory

Load lower half of maximum available capacity register from memory

v_uint8 simd512::vx_load_low (const uchar *ptr)
 
v_int8 simd512::vx_load_low (const schar *ptr)
 
v_uint16 simd512::vx_load_low (const ushort *ptr)
 
v_int16 simd512::vx_load_low (const short *ptr)
 
v_int32 simd512::vx_load_low (const int *ptr)
 
v_uint32 simd512::vx_load_low (const unsigned *ptr)
 
v_float32 simd512::vx_load_low (const float *ptr)
 
v_int64 simd512::vx_load_low (const int64 *ptr)
 
v_uint64 simd512::vx_load_low (const uint64 *ptr)
 
v_float64 simd512::vx_load_low (const double *ptr)
 

Wide load halfs from memory

Load maximum available capacity register contents from two memory blocks

v_uint8 simd512::vx_load_halves (const uchar *ptr0, const uchar *ptr1)
 
v_int8 simd512::vx_load_halves (const schar *ptr0, const schar *ptr1)
 
v_uint16 simd512::vx_load_halves (const ushort *ptr0, const ushort *ptr1)
 
v_int16 simd512::vx_load_halves (const short *ptr0, const short *ptr1)
 
v_int32 simd512::vx_load_halves (const int *ptr0, const int *ptr1)
 
v_uint32 simd512::vx_load_halves (const unsigned *ptr0, const unsigned *ptr1)
 
v_float32 simd512::vx_load_halves (const float *ptr0, const float *ptr1)
 
v_int64 simd512::vx_load_halves (const int64 *ptr0, const int64 *ptr1)
 
v_uint64 simd512::vx_load_halves (const uint64 *ptr0, const uint64 *ptr1)
 
v_float64 simd512::vx_load_halves (const double *ptr0, const double *ptr1)
 

Wide LUT of elements

Load maximum available capacity register contents with array elements by provided indexes

v_uint8 simd512::vx_lut (const uchar *ptr, const int *idx)
 
v_int8 simd512::vx_lut (const schar *ptr, const int *idx)
 
v_uint16 simd512::vx_lut (const ushort *ptr, const int *idx)
 
v_int16 simd512::vx_lut (const short *ptr, const int *idx)
 
v_int32 simd512::vx_lut (const int *ptr, const int *idx)
 
v_uint32 simd512::vx_lut (const unsigned *ptr, const int *idx)
 
v_float32 simd512::vx_lut (const float *ptr, const int *idx)
 
v_int64 simd512::vx_lut (const int64 *ptr, const int *idx)
 
v_uint64 simd512::vx_lut (const uint64 *ptr, const int *idx)
 
v_float64 simd512::vx_lut (const double *ptr, const int *idx)
 

Wide LUT of element pairs

Load maximum available capacity register contents with array element pairs by provided indexes

v_uint8 simd512::vx_lut_pairs (const uchar *ptr, const int *idx)
 
v_int8 simd512::vx_lut_pairs (const schar *ptr, const int *idx)
 
v_uint16 simd512::vx_lut_pairs (const ushort *ptr, const int *idx)
 
v_int16 simd512::vx_lut_pairs (const short *ptr, const int *idx)
 
v_int32 simd512::vx_lut_pairs (const int *ptr, const int *idx)
 
v_uint32 simd512::vx_lut_pairs (const unsigned *ptr, const int *idx)
 
v_float32 simd512::vx_lut_pairs (const float *ptr, const int *idx)
 
v_int64 simd512::vx_lut_pairs (const int64 *ptr, const int *idx)
 
v_uint64 simd512::vx_lut_pairs (const uint64 *ptr, const int *idx)
 
v_float64 simd512::vx_lut_pairs (const double *ptr, const int *idx)
 

Wide LUT of element quads

Load maximum available capacity register contents with array element quads by provided indexes

v_uint8 simd512::vx_lut_quads (const uchar *ptr, const int *idx)
 
v_int8 simd512::vx_lut_quads (const schar *ptr, const int *idx)
 
v_uint16 simd512::vx_lut_quads (const ushort *ptr, const int *idx)
 
v_int16 simd512::vx_lut_quads (const short *ptr, const int *idx)
 
v_int32 simd512::vx_lut_quads (const int *ptr, const int *idx)
 
v_uint32 simd512::vx_lut_quads (const unsigned *ptr, const int *idx)
 
v_float32 simd512::vx_lut_quads (const float *ptr, const int *idx)
 

Wide load with double expansion

Load maximum available capacity register contents from memory with double expand

v_uint16 simd512::vx_load_expand (const uchar *ptr)
 
v_int16 simd512::vx_load_expand (const schar *ptr)
 
v_uint32 simd512::vx_load_expand (const ushort *ptr)
 
v_int32 simd512::vx_load_expand (const short *ptr)
 
v_int64 simd512::vx_load_expand (const int *ptr)
 
v_uint64 simd512::vx_load_expand (const unsigned *ptr)
 
v_float32 simd512::vx_load_expand (const float16_t *ptr)
 

Wide load with quad expansion

Load maximum available capacity register contents from memory with quad expand

v_uint32 simd512::vx_load_expand_q (const uchar *ptr)
 
v_int32 simd512::vx_load_expand_q (const schar *ptr)
 

Init with zero

Create new vector with zero elements

v_uint8x16 cv::v_setzero_u8 ()
 
v_int8x16 cv::v_setzero_s8 ()
 
v_uint16x8 cv::v_setzero_u16 ()
 
v_int16x8 cv::v_setzero_s16 ()
 
v_uint32x4 cv::v_setzero_u32 ()
 
v_int32x4 cv::v_setzero_s32 ()
 
v_float32x4 cv::v_setzero_f32 ()
 
v_float64x2 cv::v_setzero_f64 ()
 
v_uint64x2 cv::v_setzero_u64 ()
 
v_int64x2 cv::v_setzero_s64 ()
 
v_uint8x32 cv::v256_setzero_u8 ()
 
v_int8x32 cv::v256_setzero_s8 ()
 
v_uint16x16 cv::v256_setzero_u16 ()
 
v_int16x16 cv::v256_setzero_s16 ()
 
v_uint32x8 cv::v256_setzero_u32 ()
 
v_int32x8 cv::v256_setzero_s32 ()
 
v_float32x8 cv::v256_setzero_f32 ()
 
v_float64x4 cv::v256_setzero_f64 ()
 
v_uint64x4 cv::v256_setzero_u64 ()
 
v_int64x4 cv::v256_setzero_s64 ()
 
v_uint8x64 cv::v512_setzero_u8 ()
 
v_int8x64 cv::v512_setzero_s8 ()
 
v_uint16x32 cv::v512_setzero_u16 ()
 
v_int16x32 cv::v512_setzero_s16 ()
 
v_uint32x16 cv::v512_setzero_u32 ()
 
v_int32x16 cv::v512_setzero_s32 ()
 
v_float32x16 cv::v512_setzero_f32 ()
 
v_float64x8 cv::v512_setzero_f64 ()
 
v_uint64x8 cv::v512_setzero_u64 ()
 
v_int64x8 cv::v512_setzero_s64 ()
 

Init with value

Create new vector with elements set to a specific value

v_uint8x16 cv::v_setall_u8 (uchar val)
 
v_int8x16 cv::v_setall_s8 (schar val)
 
v_uint16x8 cv::v_setall_u16 (ushort val)
 
v_int16x8 cv::v_setall_s16 (short val)
 
v_uint32x4 cv::v_setall_u32 (unsigned val)
 
v_int32x4 cv::v_setall_s32 (int val)
 
v_float32x4 cv::v_setall_f32 (float val)
 
v_float64x2 cv::v_setall_f64 (double val)
 
v_uint64x2 cv::v_setall_u64 (uint64 val)
 
v_int64x2 cv::v_setall_s64 (int64 val)
 
v_uint8x32 cv::v256_setall_u8 (uchar val)
 
v_int8x32 cv::v256_setall_s8 (schar val)
 
v_uint16x16 cv::v256_setall_u16 (ushort val)
 
v_int16x16 cv::v256_setall_s16 (short val)
 
v_uint32x8 cv::v256_setall_u32 (unsigned val)
 
v_int32x8 cv::v256_setall_s32 (int val)
 
v_float32x8 cv::v256_setall_f32 (float val)
 
v_float64x4 cv::v256_setall_f64 (double val)
 
v_uint64x4 cv::v256_setall_u64 (uint64 val)
 
v_int64x4 cv::v256_setall_s64 (int64 val)
 
v_uint8x64 cv::v512_setall_u8 (uchar val)
 
v_int8x64 cv::v512_setall_s8 (schar val)
 
v_uint16x32 cv::v512_setall_u16 (ushort val)
 
v_int16x32 cv::v512_setall_s16 (short val)
 
v_uint32x16 cv::v512_setall_u32 (unsigned val)
 
v_int32x16 cv::v512_setall_s32 (int val)
 
v_float32x16 cv::v512_setall_f32 (float val)
 
v_float64x8 cv::v512_setall_f64 (double val)
 
v_uint64x8 cv::v512_setall_u64 (uint64 val)
 
v_int64x8 cv::v512_setall_s64 (int64 val)
 

Reinterpret

Convert vector to different type without modifying underlying data.

template<typename _Tp0 , int n0>
v_reg< uchar, n0 *sizeof(_Tp0)/sizeof(uchar)> cv::v_reinterpret_as_u8 (const v_reg< _Tp0, n0 > &a)
 
template<typename _Tp0 , int n0>
v_reg< schar, n0 *sizeof(_Tp0)/sizeof(schar)> cv::v_reinterpret_as_s8 (const v_reg< _Tp0, n0 > &a)
 
template<typename _Tp0 , int n0>
v_reg< ushort, n0 *sizeof(_Tp0)/sizeof(ushort)> cv::v_reinterpret_as_u16 (const v_reg< _Tp0, n0 > &a)
 
template<typename _Tp0 , int n0>
v_reg< short, n0 *sizeof(_Tp0)/sizeof(short)> cv::v_reinterpret_as_s16 (const v_reg< _Tp0, n0 > &a)
 
template<typename _Tp0 , int n0>
v_reg< unsigned, n0 *sizeof(_Tp0)/sizeof(unsigned)> cv::v_reinterpret_as_u32 (const v_reg< _Tp0, n0 > &a)
 
template<typename _Tp0 , int n0>
v_reg< int, n0 *sizeof(_Tp0)/sizeof(int)> cv::v_reinterpret_as_s32 (const v_reg< _Tp0, n0 > &a)
 
template<typename _Tp0 , int n0>
v_reg< float, n0 *sizeof(_Tp0)/sizeof(float)> cv::v_reinterpret_as_f32 (const v_reg< _Tp0, n0 > &a)
 
template<typename _Tp0 , int n0>
v_reg< double, n0 *sizeof(_Tp0)/sizeof(double)> cv::v_reinterpret_as_f64 (const v_reg< _Tp0, n0 > &a)
 
template<typename _Tp0 , int n0>
v_reg< uint64, n0 *sizeof(_Tp0)/sizeof(uint64)> cv::v_reinterpret_as_u64 (const v_reg< _Tp0, n0 > &a)
 
template<typename _Tp0 , int n0>
v_reg< int64, n0 *sizeof(_Tp0)/sizeof(int64)> cv::v_reinterpret_as_s64 (const v_reg< _Tp0, n0 > &a)
 

Left shift

Shift left

template<int shift, int n>
v_reg< ushort, n > cv::v_shl (const v_reg< ushort, n > &a)
 
template<int shift, int n>
v_reg< short, n > cv::v_shl (const v_reg< short, n > &a)
 
template<int shift, int n>
v_reg< unsigned, n > cv::v_shl (const v_reg< unsigned, n > &a)
 
template<int shift, int n>
v_reg< int, n > cv::v_shl (const v_reg< int, n > &a)
 
template<int shift, int n>
v_reg< uint64, n > cv::v_shl (const v_reg< uint64, n > &a)
 
template<int shift, int n>
v_reg< int64, n > cv::v_shl (const v_reg< int64, n > &a)
 

Right shift

Shift right

template<int shift, int n>
v_reg< ushort, n > cv::v_shr (const v_reg< ushort, n > &a)
 
template<int shift, int n>
v_reg< short, n > cv::v_shr (const v_reg< short, n > &a)
 
template<int shift, int n>
v_reg< unsigned, n > cv::v_shr (const v_reg< unsigned, n > &a)
 
template<int shift, int n>
v_reg< int, n > cv::v_shr (const v_reg< int, n > &a)
 
template<int shift, int n>
v_reg< uint64, n > cv::v_shr (const v_reg< uint64, n > &a)
 
template<int shift, int n>
v_reg< int64, n > cv::v_shr (const v_reg< int64, n > &a)
 

Rounding shift

Rounding shift right

template<int shift, int n>
v_reg< ushort, n > cv::v_rshr (const v_reg< ushort, n > &a)
 
template<int shift, int n>
v_reg< short, n > cv::v_rshr (const v_reg< short, n > &a)
 
template<int shift, int n>
v_reg< unsigned, n > cv::v_rshr (const v_reg< unsigned, n > &a)
 
template<int shift, int n>
v_reg< int, n > cv::v_rshr (const v_reg< int, n > &a)
 
template<int shift, int n>
v_reg< uint64, n > cv::v_rshr (const v_reg< uint64, n > &a)
 
template<int shift, int n>
v_reg< int64, n > cv::v_rshr (const v_reg< int64, n > &a)
 

Pack

Pack values from two vectors to one

Return vector type have twice more elements than input vector types. Variant with u suffix also converts to corresponding unsigned type.

  • pack: for 16-, 32- and 64-bit integer input types
  • pack_u: for 16- and 32-bit signed integer input types
Note
All variants except 64-bit use saturation.
template<int n>
v_reg< uchar, 2 *n > cv::v_pack (const v_reg< ushort, n > &a, const v_reg< ushort, n > &b)
 
template<int n>
v_reg< schar, 2 *n > cv::v_pack (const v_reg< short, n > &a, const v_reg< short, n > &b)
 
template<int n>
v_reg< ushort, 2 *n > cv::v_pack (const v_reg< unsigned, n > &a, const v_reg< unsigned, n > &b)
 
template<int n>
v_reg< short, 2 *n > cv::v_pack (const v_reg< int, n > &a, const v_reg< int, n > &b)
 
template<int n>
v_reg< unsigned, 2 *n > cv::v_pack (const v_reg< uint64, n > &a, const v_reg< uint64, n > &b)
 
template<int n>
v_reg< int, 2 *n > cv::v_pack (const v_reg< int64, n > &a, const v_reg< int64, n > &b)
 
template<int n>
v_reg< uchar, 2 *n > cv::v_pack_u (const v_reg< short, n > &a, const v_reg< short, n > &b)
 
template<int n>
v_reg< ushort, 2 *n > cv::v_pack_u (const v_reg< int, n > &a, const v_reg< int, n > &b)
 

Pack with rounding shift

Pack values from two vectors to one with rounding shift

Values from the input vectors will be shifted right by n bits with rounding, converted to narrower type and returned in the result vector. Variant with u suffix converts to unsigned type.

  • pack: for 16-, 32- and 64-bit integer input types
  • pack_u: for 16- and 32-bit signed integer input types
Note
All variants except 64-bit use saturation.
template<int shift, int n>
v_reg< uchar, 2 *n > cv::v_rshr_pack (const v_reg< ushort, n > &a, const v_reg< ushort, n > &b)
 
template<int shift, int n>
v_reg< schar, 2 *n > cv::v_rshr_pack (const v_reg< short, n > &a, const v_reg< short, n > &b)
 
template<int shift, int n>
v_reg< ushort, 2 *n > cv::v_rshr_pack (const v_reg< unsigned, n > &a, const v_reg< unsigned, n > &b)
 
template<int shift, int n>
v_reg< short, 2 *n > cv::v_rshr_pack (const v_reg< int, n > &a, const v_reg< int, n > &b)
 
template<int shift, int n>
v_reg< unsigned, 2 *n > cv::v_rshr_pack (const v_reg< uint64, n > &a, const v_reg< uint64, n > &b)
 
template<int shift, int n>
v_reg< int, 2 *n > cv::v_rshr_pack (const v_reg< int64, n > &a, const v_reg< int64, n > &b)
 
template<int shift, int n>
v_reg< uchar, 2 *n > cv::v_rshr_pack_u (const v_reg< short, n > &a, const v_reg< short, n > &b)
 
template<int shift, int n>
v_reg< ushort, 2 *n > cv::v_rshr_pack_u (const v_reg< int, n > &a, const v_reg< int, n > &b)
 

Pack and store

Store values from the input vector into memory with pack

Values will be stored into memory with conversion to narrower type. Variant with u suffix converts to corresponding unsigned type.

  • pack: for 16-, 32- and 64-bit integer input types
  • pack_u: for 16- and 32-bit signed integer input types
Note
All variants except 64-bit use saturation.
template<int n>
void cv::v_pack_store (uchar *ptr, const v_reg< ushort, n > &a)
 
template<int n>
void cv::v_pack_store (schar *ptr, const v_reg< short, n > &a)
 
template<int n>
void cv::v_pack_store (ushort *ptr, const v_reg< unsigned, n > &a)
 
template<int n>
void cv::v_pack_store (short *ptr, const v_reg< int, n > &a)
 
template<int n>
void cv::v_pack_store (unsigned *ptr, const v_reg< uint64, n > &a)
 
template<int n>
void cv::v_pack_store (int *ptr, const v_reg< int64, n > &a)
 
template<int n>
void cv::v_pack_u_store (uchar *ptr, const v_reg< short, n > &a)
 
template<int n>
void cv::v_pack_u_store (ushort *ptr, const v_reg< int, n > &a)
 

Pack and store with rounding shift

Store values from the input vector into memory with pack

Values will be shifted n bits right with rounding, converted to narrower type and stored into memory. Variant with u suffix converts to unsigned type.

  • pack: for 16-, 32- and 64-bit integer input types
  • pack_u: for 16- and 32-bit signed integer input types
Note
All variants except 64-bit use saturation.
template<int shift, int n>
void cv::v_rshr_pack_store (uchar *ptr, const v_reg< ushort, n > &a)
 
template<int shift, int n>
void cv::v_rshr_pack_store (schar *ptr, const v_reg< short, n > &a)
 
template<int shift, int n>
void cv::v_rshr_pack_store (ushort *ptr, const v_reg< unsigned, n > &a)
 
template<int shift, int n>
void cv::v_rshr_pack_store (short *ptr, const v_reg< int, n > &a)
 
template<int shift, int n>
void cv::v_rshr_pack_store (unsigned *ptr, const v_reg< uint64, n > &a)
 
template<int shift, int n>
void cv::v_rshr_pack_store (int *ptr, const v_reg< int64, n > &a)
 
template<int shift, int n>
void cv::v_rshr_pack_u_store (uchar *ptr, const v_reg< short, n > &a)
 
template<int shift, int n>
void cv::v_rshr_pack_u_store (ushort *ptr, const v_reg< int, n > &a)
 

Pack boolean values

Pack boolean values from multiple vectors to one unsigned 8-bit integer vector

Note
Must provide valid boolean values to guarantee same result for all architectures.
template<int n>
v_reg< uchar, 2 *n > cv::v_pack_b (const v_reg< ushort, n > &a, const v_reg< ushort, n > &b)
 ! For 16-bit boolean values More...
 
template<int n>
v_reg< uchar, 4 *n > cv::v_pack_b (const v_reg< unsigned, n > &a, const v_reg< unsigned, n > &b, const v_reg< unsigned, n > &c, const v_reg< unsigned, n > &d)
 
template<int n>
v_reg< uchar, 8 *n > cv::v_pack_b (const v_reg< uint64, n > &a, const v_reg< uint64, n > &b, const v_reg< uint64, n > &c, const v_reg< uint64, n > &d, const v_reg< uint64, n > &e, const v_reg< uint64, n > &f, const v_reg< uint64, n > &g, const v_reg< uint64, n > &h)
 

Detailed Description

"Universal intrinsics" is a types and functions set intended to simplify vectorization of code on different platforms. Currently a few different SIMD extensions on different architectures are supported. 128 bit registers of various types support is implemented for a wide range of architectures including x86(SSE/SSE2/SSE4.2), ARM(NEON), PowerPC(VSX), MIPS(MSA). 256 bit long registers are supported on x86(AVX2) and 512 bit long registers are supported on x86(AVX512). In case when there is no SIMD extension available during compilation, fallback C++ implementation of intrinsics will be chosen and code will work as expected although it could be slower.

Types

There are several types representing packed values vector registers, each type is implemented as a structure based on a one SIMD register.

Exact bit length(and value quantity) of listed types is compile time deduced and depends on architecture SIMD capabilities chosen as available during compilation of the library. All the types contains nlanes enumeration to check for exact value quantity of the type.

In case the exact bit length of the type is important it is possible to use specific fixed length register types.

There are several types representing 128-bit registers.

There are several types representing 256-bit registers.

Note
256 bit registers at the moment implemented for AVX2 SIMD extension only, if you want to use this type directly, don't forget to check the CV_SIMD256 preprocessor definition:
#if CV_SIMD256
//...
#endif

There are several types representing 512-bit registers.

These operations allow to set contents of the register explicitly or by loading it from some memory block and to save contents of the register to memory block.

There are variable size register load operations that provide result of maximum available size depending on chosen platform capabilities.

Also there are fixed size register load/store operations.

For 128 bit registers

For 256 bit registers(check CV_SIMD256 preprocessor definition)

For 512 bit registers(check CV_SIMD512 preprocessor definition)

Store to memory operations are similar across different platform capabilities: v_store, v_store_aligned, v_store_high, v_store_low

Value reordering

These operations allow to reorder or recombine elements in one or multiple vectors.

Arithmetic, bitwise and comparison operations

Element-wise binary and unary operations.

Reduce and mask

Most of these operations return only one value.

Other math

Conversions

Different type conversions and casts:

Matrix operations

In these operations vectors represent matrix rows/columns: v_dotprod, v_dotprod_fast, v_dotprod_expand, v_dotprod_expand_fast, v_matmul, v_transpose4x4

Usability

Most operations are implemented only for some subset of the available types, following matrices shows the applicability of different operations to the types.

Regular integers:

Operations\Types uint 8 int 8 uint 16 int 16 uint 32 int 32
load, store x x x x x x
interleave x x x x x x
expand x x x x x x
expand_low x x x x x x
expand_high x x x x x x
expand_q x x
add, sub x x x x x x
add_wrap, sub_wrap x x x x
mul_wrap x x x x
mul x x x x x x
mul_expand x x x x x
compare x x x x x x
shift x x x x
dotprod x x
dotprod_fast x x
dotprod_expand x x x x x
dotprod_expand_fastx x x x x
logical x x x x x x
min, max x x x x x x
absdiff x x x x x x
absdiffs x x
reduce x x x x x x
mask x x x x x x
pack x x x x x x
pack_u x x
pack_b x
unpack x x x x x x
extract x x x x x x
rotate (lanes) x x x x x x
cvt_flt32 x
cvt_flt64 x
transpose4x4 x x
reverse x x x x x x
extract_n x x x x x x
broadcast_element x x

Big integers:

Operations\Types uint 64 int 64
load, store x x
add, sub x x
shift x x
logical x x
reverse x x
extract x x
rotate (lanes) x x
cvt_flt64 x
extract_n x x

Floating point:

Operations\Types float 32 float 64
load, store x x
interleave x
add, sub x x
mul x x
div x x
compare x x
min, max x x
absdiff x x
reduce x
mask x x
unpack x x
cvt_flt32 x
cvt_flt64 x
sqrt, abs x x
float math x x
transpose4x4 x
extract x x
rotate (lanes) x x
reverse x x
extract_n x x
broadcast_element x

Macro Definition Documentation

◆ OPENCV_HAL_WRAP_BIN_OP_ADDSUB

#define OPENCV_HAL_WRAP_BIN_OP_ADDSUB (   _Tpvec)

#include <opencv2/core/hal/intrin.hpp>

Value:
inline _Tpvec v_add(const _Tpvec& a, const _Tpvec& b) \
{ \
return a + b; \
} \
inline _Tpvec v_sub(const _Tpvec& a, const _Tpvec& b) \
{ \
return a - b; \
} \
template<typename... Args> \
inline _Tpvec v_add(const _Tpvec& f1, const _Tpvec& f2, const Args&... vf) { \
return v_add(f1 + f2, vf...); \
}
v_float64 v_sub(const v_float64 &a, const v_float64 &b)
Definition: intrin.hpp:731
v_float64 v_add(const v_float64 &f1, const v_float64 &f2, const Args &... vf)
Definition: intrin.hpp:731

◆ OPENCV_HAL_WRAP_BIN_OP_LOGIC

#define OPENCV_HAL_WRAP_BIN_OP_LOGIC (   _Tpvec)

#include <opencv2/core/hal/intrin.hpp>

Value:
inline _Tpvec v_and(const _Tpvec& a, const _Tpvec& b) \
{ \
return a & b; \
} \
inline _Tpvec v_or(const _Tpvec& a, const _Tpvec& b) \
{ \
return a | b; \
} \
inline _Tpvec v_xor(const _Tpvec& a, const _Tpvec& b) \
{ \
return a ^ b; \
} \
inline _Tpvec v_not(const _Tpvec& a) \
{ \
return ~a; \
}
v_int64 v_and(const v_int64 &a, const v_int64 &b)
Definition: intrin.hpp:759
v_int64 v_or(const v_int64 &a, const v_int64 &b)
Definition: intrin.hpp:759
v_int64 v_xor(const v_int64 &a, const v_int64 &b)
Definition: intrin.hpp:759
v_int64 v_not(const v_int64 &a)
Definition: intrin.hpp:759

◆ OPENCV_HAL_WRAP_BIN_OP_MUL

#define OPENCV_HAL_WRAP_BIN_OP_MUL (   _Tpvec)

#include <opencv2/core/hal/intrin.hpp>

Value:
inline _Tpvec v_mul(const _Tpvec& a, const _Tpvec& b) \
{ \
return a * b; \
} \
template<typename... Args> \
inline _Tpvec v_mul(const _Tpvec& f1, const _Tpvec& f2, const Args&... vf) { \
return v_mul(f1 * f2, vf...); \
}
v_float64 v_mul(const v_float64 &f1, const v_float64 &f2, const Args &... vf)
Definition: intrin.hpp:779

◆ OPENCV_HAL_WRAP_BROADCAST

#define OPENCV_HAL_WRAP_BROADCAST (   _Tpvec)

#include <opencv2/core/hal/intrin.hpp>

Value:
inline _Tpvec v_broadcast_highest(const _Tpvec& v) \
{ \
return v_broadcast_element<VTraits<_Tpvec>::nlanes-1>(v); \
}
v_float32 v_broadcast_highest(const v_float32 &v)
Definition: intrin.hpp:868

◆ OPENCV_HAL_WRAP_CMP

#define OPENCV_HAL_WRAP_CMP (   _Tpvec)

#include <opencv2/core/hal/intrin.hpp>

Value:
OPENCV_HAL_WRAP_CMP_OP(_Tpvec, eq, ==) \
OPENCV_HAL_WRAP_CMP_OP(_Tpvec, ne, !=) \
OPENCV_HAL_WRAP_CMP_OP(_Tpvec, lt, <) \
OPENCV_HAL_WRAP_CMP_OP(_Tpvec, gt, >) \
OPENCV_HAL_WRAP_CMP_OP(_Tpvec, le, <=) \
OPENCV_HAL_WRAP_CMP_OP(_Tpvec, ge, >=)
#define OPENCV_HAL_WRAP_CMP_OP(_Tpvec, intrin, op)
Definition: intrin.hpp:794

◆ OPENCV_HAL_WRAP_CMP_OP

#define OPENCV_HAL_WRAP_CMP_OP (   _Tpvec,
  intrin,
  op 
)

#include <opencv2/core/hal/intrin.hpp>

Value:
inline _Tpvec v_##intrin(const _Tpvec& a, const _Tpvec& b) \
{ \
return a op b; \
}

◆ OPENCV_HAL_WRAP_EXTRACT

#define OPENCV_HAL_WRAP_EXTRACT (   _Tpvec,
  _Tp,
  vl 
)

#include <opencv2/core/hal/intrin.hpp>

Value:
inline _Tp v_extract_highest(const _Tpvec& v) \
{ \
return v_extract_n<vl-1>(v); \
}
_Tp v_extract_n(const v_reg< _Tp, n > &v)
Vector extract.
Definition: intrin_cpp.hpp:2401
double v_extract_highest(const v_float64 &v)
Definition: intrin.hpp:857

◆ OPENCV_HAL_WRAP_GRT0_INT

#define OPENCV_HAL_WRAP_GRT0_INT (   _Tpvec,
  _Tp 
)

#include <opencv2/core/hal/intrin.hpp>

Value:
inline _Tp v_get0(const v_##_Tpvec& v) \
{ \
return v.get0(); \
}
double v_get0(const v_float64 &v)
Definition: intrin.hpp:838

Typedef Documentation

◆ v_float32

typedef v_float32x16 simd512::v_float32

#include <opencv2/core/hal/intrin.hpp>

Maximum available vector register capacity 32-bit floating point values (single precision)

◆ v_float32x16

typedef v_reg<float, 16> cv::v_float32x16

#include <opencv2/core/hal/intrin_cpp.hpp>

Sixteen 32-bit floating point values (single precision)

◆ v_float32x4

typedef v_reg<float, 4> cv::v_float32x4

#include <opencv2/core/hal/intrin_cpp.hpp>

Four 32-bit floating point values (single precision)

◆ v_float32x8

typedef v_reg<float, 8> cv::v_float32x8

#include <opencv2/core/hal/intrin_cpp.hpp>

Eight 32-bit floating point values (single precision)

◆ v_float64

typedef v_float64x8 simd512::v_float64

#include <opencv2/core/hal/intrin.hpp>

Maximum available vector register capacity 64-bit floating point values (double precision)

◆ v_float64x2

typedef v_reg<double, 2> cv::v_float64x2

#include <opencv2/core/hal/intrin_cpp.hpp>

Two 64-bit floating point values (double precision)

◆ v_float64x4

typedef v_reg<double, 4> cv::v_float64x4

#include <opencv2/core/hal/intrin_cpp.hpp>

Four 64-bit floating point values (double precision)

◆ v_float64x8

typedef v_reg<double, 8> cv::v_float64x8

#include <opencv2/core/hal/intrin_cpp.hpp>

Eight 64-bit floating point values (double precision)

◆ v_int16

typedef v_int16x32 simd512::v_int16

#include <opencv2/core/hal/intrin.hpp>

Maximum available vector register capacity 16-bit signed integer values.

◆ v_int16x16

typedef v_reg<short, 16> cv::v_int16x16

#include <opencv2/core/hal/intrin_cpp.hpp>

Sixteen 16-bit signed integer values.

◆ v_int16x32

typedef v_reg<short, 32> cv::v_int16x32

#include <opencv2/core/hal/intrin_cpp.hpp>

Thirty two 16-bit signed integer values.

◆ v_int16x8

typedef v_reg<short, 8> cv::v_int16x8

#include <opencv2/core/hal/intrin_cpp.hpp>

Eight 16-bit signed integer values.

◆ v_int32

typedef v_int32x16 simd512::v_int32

#include <opencv2/core/hal/intrin.hpp>

Maximum available vector register capacity 32-bit signed integer values.

◆ v_int32x16

typedef v_reg<int, 16> cv::v_int32x16

#include <opencv2/core/hal/intrin_cpp.hpp>

Sixteen 32-bit signed integer values.

◆ v_int32x4

typedef v_reg<int, 4> cv::v_int32x4

#include <opencv2/core/hal/intrin_cpp.hpp>

Four 32-bit signed integer values.

◆ v_int32x8

typedef v_reg<int, 8> cv::v_int32x8

#include <opencv2/core/hal/intrin_cpp.hpp>

Eight 32-bit signed integer values.

◆ v_int64

typedef v_int64x8 simd512::v_int64

#include <opencv2/core/hal/intrin.hpp>

Maximum available vector register capacity 64-bit signed integer values.

◆ v_int64x2

typedef v_reg<int64, 2> cv::v_int64x2

#include <opencv2/core/hal/intrin_cpp.hpp>

Two 64-bit signed integer values.

◆ v_int64x4

typedef v_reg<int64, 4> cv::v_int64x4

#include <opencv2/core/hal/intrin_cpp.hpp>

Four 64-bit signed integer values.

◆ v_int64x8

typedef v_reg<int64, 8> cv::v_int64x8

#include <opencv2/core/hal/intrin_cpp.hpp>

Eight 64-bit signed integer values.

◆ v_int8

typedef v_int8x64 simd512::v_int8

#include <opencv2/core/hal/intrin.hpp>

Maximum available vector register capacity 8-bit signed integer values.

◆ v_int8x16

typedef v_reg<schar, 16> cv::v_int8x16

#include <opencv2/core/hal/intrin_cpp.hpp>

Sixteen 8-bit signed integer values.

◆ v_int8x32

typedef v_reg<schar, 32> cv::v_int8x32

#include <opencv2/core/hal/intrin_cpp.hpp>

Thirty two 8-bit signed integer values.

◆ v_int8x64

typedef v_reg<schar, 64> cv::v_int8x64

#include <opencv2/core/hal/intrin_cpp.hpp>

Sixty four 8-bit signed integer values.

◆ v_uint16

typedef v_uint16x32 simd512::v_uint16

#include <opencv2/core/hal/intrin.hpp>

Maximum available vector register capacity 16-bit unsigned integer values.

◆ v_uint16x16

#include <opencv2/core/hal/intrin_cpp.hpp>

Sixteen 16-bit unsigned integer values.

◆ v_uint16x32

#include <opencv2/core/hal/intrin_cpp.hpp>

Thirty two 16-bit unsigned integer values.

◆ v_uint16x8

#include <opencv2/core/hal/intrin_cpp.hpp>

Eight 16-bit unsigned integer values.

◆ v_uint32

typedef v_uint32x16 simd512::v_uint32

#include <opencv2/core/hal/intrin.hpp>

Maximum available vector register capacity 32-bit unsigned integer values.

◆ v_uint32x16

typedef v_reg<unsigned, 16> cv::v_uint32x16

#include <opencv2/core/hal/intrin_cpp.hpp>

Sixteen 32-bit unsigned integer values.

◆ v_uint32x4

typedef v_reg<unsigned, 4> cv::v_uint32x4

#include <opencv2/core/hal/intrin_cpp.hpp>

Four 32-bit unsigned integer values.

◆ v_uint32x8

typedef v_reg<unsigned, 8> cv::v_uint32x8

#include <opencv2/core/hal/intrin_cpp.hpp>

Eight 32-bit unsigned integer values.

◆ v_uint64

typedef v_uint64x8 simd512::v_uint64

#include <opencv2/core/hal/intrin.hpp>

Maximum available vector register capacity 64-bit unsigned integer values.

◆ v_uint64x2

#include <opencv2/core/hal/intrin_cpp.hpp>

Two 64-bit unsigned integer values.

◆ v_uint64x4

#include <opencv2/core/hal/intrin_cpp.hpp>

Four 64-bit unsigned integer values.

◆ v_uint64x8

#include <opencv2/core/hal/intrin_cpp.hpp>

Eight 64-bit unsigned integer values.

◆ v_uint8

typedef v_uint8x64 simd512::v_uint8

#include <opencv2/core/hal/intrin.hpp>

Maximum available vector register capacity 8-bit unsigned integer values.

◆ v_uint8x16

typedef v_reg<uchar, 16> cv::v_uint8x16

#include <opencv2/core/hal/intrin_cpp.hpp>

Sixteen 8-bit unsigned integer values.

◆ v_uint8x32

typedef v_reg<uchar, 32> cv::v_uint8x32

#include <opencv2/core/hal/intrin_cpp.hpp>

Thirty two 8-bit unsigned integer values.

◆ v_uint8x64

typedef v_reg<uchar, 64> cv::v_uint8x64

#include <opencv2/core/hal/intrin_cpp.hpp>

Sixty four 8-bit unsigned integer values.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

#include <opencv2/core/hal/intrin_cpp.hpp>

Enumerator
simd128_width 
simd256_width 
simd512_width 
simdmax_width 

Function Documentation

◆ operator &()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::operator& ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)

#include <opencv2/core/hal/intrin_cpp.hpp>

Bitwise AND.

Only for integer types.

◆ operator &=()

template<typename _Tp , int n>
v_reg<_Tp, n>& cv::operator&= ( v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)

◆ operator!=()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::operator!= ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Not equal comparison.

For all types except 64-bit integer values.

◆ operator*()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::operator* ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)

#include <opencv2/core/hal/intrin_cpp.hpp>

Multiply values.

For 16- and 32-bit integer types and floating types.

◆ operator*=()

template<typename _Tp , int n>
v_reg<_Tp, n>& cv::operator*= ( v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)

◆ operator+()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::operator+ ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)

#include <opencv2/core/hal/intrin_cpp.hpp>

Add values.

For all types.

◆ operator+=()

template<typename _Tp , int n>
v_reg<_Tp, n>& cv::operator+= ( v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)

◆ operator-()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::operator- ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)

#include <opencv2/core/hal/intrin_cpp.hpp>

Subtract values.

For all types.

◆ operator-=()

template<typename _Tp , int n>
v_reg<_Tp, n>& cv::operator-= ( v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)

◆ operator/()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::operator/ ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)

#include <opencv2/core/hal/intrin_cpp.hpp>

Divide values.

For floating types only.

◆ operator/=()

template<typename _Tp , int n>
v_reg<_Tp, n>& cv::operator/= ( v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)

◆ operator<()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::operator< ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Less-than comparison.

For all types except 64-bit integer values.

◆ operator<<()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::operator<< ( const v_reg< _Tp, n > &  a,
int  imm 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Bitwise shift left.

For 16-, 32- and 64-bit integer values.

◆ operator<=()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::operator<= ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Less-than or equal comparison.

For all types except 64-bit integer values.

◆ operator==()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::operator== ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Equal comparison.

For all types except 64-bit integer values.

◆ operator>()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::operator> ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Greater-than comparison.

For all types except 64-bit integer values.

◆ operator>=()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::operator>= ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Greater-than or equal comparison.

For all types except 64-bit integer values.

◆ operator>>()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::operator>> ( const v_reg< _Tp, n > &  a,
int  imm 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Bitwise shift right.

For 16-, 32- and 64-bit integer values.

◆ operator^()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::operator^ ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)

#include <opencv2/core/hal/intrin_cpp.hpp>

Bitwise XOR.

Only for integer types.

◆ operator^=()

template<typename _Tp , int n>
v_reg<_Tp, n>& cv::operator^= ( v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)

◆ operator|()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::operator| ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)

#include <opencv2/core/hal/intrin_cpp.hpp>

Bitwise OR.

Only for integer types.

◆ operator|=()

template<typename _Tp , int n>
v_reg<_Tp, n>& cv::operator|= ( v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)

◆ operator~()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::operator~ ( const v_reg< _Tp, n > &  a)

#include <opencv2/core/hal/intrin_cpp.hpp>

Bitwise NOT.

Only for integer types.

◆ v256_cleanup()

void cv::v256_cleanup ( )
inline

◆ v256_load()

template<typename _Tp >
v_reg<_Tp, simd256_width / sizeof(_Tp)> cv::v256_load ( const _Tp *  ptr)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load 256-bit length register contents from memory.

Parameters
ptrpointer to memory block with data
Returns
register object
Note
Returned type will be detected from passed pointer type, for example uchar ==> cv::v_uint8x32, int ==> cv::v_int32x8, etc.
Check CV_SIMD256 preprocessor definition prior to use. Use vx_load version to get maximum available register length result
Alignment requirement: if CV_STRONG_ALIGNMENT=1 then passed pointer must be aligned (sizeof(lane type) should be enough). Do not cast pointer types without runtime check for pointer alignment (like uchar* => int*).

◆ v256_load_aligned()

template<typename _Tp >
v_reg<_Tp, simd256_width / sizeof(_Tp)> cv::v256_load_aligned ( const _Tp *  ptr)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load register contents from memory (aligned)

similar to cv::v256_load, but source memory block should be aligned (to 32-byte boundary in case of SIMD256, 64-byte - SIMD512, etc)

Note
Check CV_SIMD256 preprocessor definition prior to use. Use vx_load_aligned version to get maximum available register length result

◆ v256_load_expand() [1/2]

template<typename _Tp >
v_reg<typename V_TypeTraits<_Tp>::w_type, simd256_width / sizeof(typename V_TypeTraits<_Tp>::w_type)> cv::v256_load_expand ( const _Tp *  ptr)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load register contents from memory with double expand.

Same as cv::v256_load, but result pack type will be 2x wider than memory type.

short buf[8] = {1, 2, 3, 4, 5, 6, 7, 8}; // type is int16
v_int32x8 r = v256_load_expand(buf); // r = {1, 2, 3, 4, 5, 6, 7, 8} - type is int32

For 8-, 16-, 32-bit integer source types.

Note
Check CV_SIMD256 preprocessor definition prior to use. Use vx_load_expand version to get maximum available register length result

◆ v256_load_expand() [2/2]

v_reg<float, simd256_width / sizeof(float)> cv::v256_load_expand ( const float16_t ptr)
inline

◆ v256_load_expand_q()

template<typename _Tp >
v_reg<typename V_TypeTraits<_Tp>::q_type, simd256_width / sizeof(typename V_TypeTraits<_Tp>::q_type)> cv::v256_load_expand_q ( const _Tp *  ptr)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load register contents from memory with quad expand.

Same as cv::v256_load_expand, but result type is 4 times wider than source.

char buf[8] = {1, 2, 3, 4, 5, 6, 7, 8}; // type is int8
v_int32x8 r = v256_load_expand_q(buf); // r = {1, 2, 3, 4, 5, 6, 7, 8} - type is int32

For 8-bit integer source types.

Note
Check CV_SIMD256 preprocessor definition prior to use. Use vx_load_expand_q version to get maximum available register length result

◆ v256_load_halves()

template<typename _Tp >
v_reg<_Tp, simd256_width / sizeof(_Tp)> cv::v256_load_halves ( const _Tp *  loptr,
const _Tp *  hiptr 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load register contents from two memory blocks.

Parameters
loptrmemory block containing data for first half (0..n/2)
hiptrmemory block containing data for second half (n/2..n)
int lo[4] = { 1, 2, 3, 4 }, hi[4] = { 5, 6, 7, 8 };
Note
Check CV_SIMD256 preprocessor definition prior to use. Use vx_load_halves version to get maximum available register length result

◆ v256_load_low()

template<typename _Tp >
v_reg<_Tp, simd256_width / sizeof(_Tp)> cv::v256_load_low ( const _Tp *  ptr)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load 128-bits of data to lower part (high part is undefined).

Parameters
ptrmemory block containing data for first half (0..n/2)
int lo[4] = { 1, 2, 3, 4 };
Note
Check CV_SIMD256 preprocessor definition prior to use. Use vx_load_low version to get maximum available register length result

◆ v256_setall_f32()

v_float32x8 cv::v256_setall_f32 ( float  val)
inline

◆ v256_setall_f64()

v_float64x4 cv::v256_setall_f64 ( double  val)
inline

◆ v256_setall_s16()

v_int16x16 cv::v256_setall_s16 ( short  val)
inline

◆ v256_setall_s32()

v_int32x8 cv::v256_setall_s32 ( int  val)
inline

◆ v256_setall_s64()

v_int64x4 cv::v256_setall_s64 ( int64  val)
inline

◆ v256_setall_s8()

v_int8x32 cv::v256_setall_s8 ( schar  val)
inline

◆ v256_setall_u16()

v_uint16x16 cv::v256_setall_u16 ( ushort  val)
inline

◆ v256_setall_u32()

v_uint32x8 cv::v256_setall_u32 ( unsigned  val)
inline

◆ v256_setall_u64()

v_uint64x4 cv::v256_setall_u64 ( uint64  val)
inline

◆ v256_setall_u8()

v_uint8x32 cv::v256_setall_u8 ( uchar  val)
inline

◆ v256_setzero_f32()

v_float32x8 cv::v256_setzero_f32 ( )
inline

◆ v256_setzero_f64()

v_float64x4 cv::v256_setzero_f64 ( )
inline

◆ v256_setzero_s16()

v_int16x16 cv::v256_setzero_s16 ( )
inline

◆ v256_setzero_s32()

v_int32x8 cv::v256_setzero_s32 ( )
inline

◆ v256_setzero_s64()

v_int64x4 cv::v256_setzero_s64 ( )
inline

◆ v256_setzero_s8()

v_int8x32 cv::v256_setzero_s8 ( )
inline

◆ v256_setzero_u16()

v_uint16x16 cv::v256_setzero_u16 ( )
inline

◆ v256_setzero_u32()

v_uint32x8 cv::v256_setzero_u32 ( )
inline

◆ v256_setzero_u64()

v_uint64x4 cv::v256_setzero_u64 ( )
inline

◆ v256_setzero_u8()

v_uint8x32 cv::v256_setzero_u8 ( )
inline

◆ v512_cleanup()

void cv::v512_cleanup ( )
inline

◆ v512_load()

template<typename _Tp >
v_reg<_Tp, simd512_width / sizeof(_Tp)> cv::v512_load ( const _Tp *  ptr)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load 512-bit length register contents from memory.

Parameters
ptrpointer to memory block with data
Returns
register object
Note
Returned type will be detected from passed pointer type, for example uchar ==> cv::v_uint8x64, int ==> cv::v_int32x16, etc.
Check CV_SIMD512 preprocessor definition prior to use. Use vx_load version to get maximum available register length result
Alignment requirement: if CV_STRONG_ALIGNMENT=1 then passed pointer must be aligned (sizeof(lane type) should be enough). Do not cast pointer types without runtime check for pointer alignment (like uchar* => int*).

◆ v512_load_aligned()

template<typename _Tp >
v_reg<_Tp, simd512_width / sizeof(_Tp)> cv::v512_load_aligned ( const _Tp *  ptr)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load register contents from memory (aligned)

similar to cv::v512_load, but source memory block should be aligned (to 64-byte boundary in case of SIMD512, etc)

Note
Check CV_SIMD512 preprocessor definition prior to use. Use vx_load_aligned version to get maximum available register length result

◆ v512_load_expand() [1/2]

template<typename _Tp >
v_reg<typename V_TypeTraits<_Tp>::w_type, simd512_width / sizeof(typename V_TypeTraits<_Tp>::w_type)> cv::v512_load_expand ( const _Tp *  ptr)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load register contents from memory with double expand.

Same as cv::v512_load, but result pack type will be 2x wider than memory type.

short buf[8] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; // type is int16
v_int32x16 r = v512_load_expand(buf); // r = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16} - type is int32

For 8-, 16-, 32-bit integer source types.

Note
Check CV_SIMD512 preprocessor definition prior to use. Use vx_load_expand version to get maximum available register length result

◆ v512_load_expand() [2/2]

v_reg<float, simd512_width / sizeof(float)> cv::v512_load_expand ( const float16_t ptr)
inline

◆ v512_load_expand_q()

template<typename _Tp >
v_reg<typename V_TypeTraits<_Tp>::q_type, simd512_width / sizeof(typename V_TypeTraits<_Tp>::q_type)> cv::v512_load_expand_q ( const _Tp *  ptr)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load register contents from memory with quad expand.

Same as cv::v512_load_expand, but result type is 4 times wider than source.

char buf[16] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; // type is int8
v_int32x16 r = v512_load_expand_q(buf); // r = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16} - type is int32

For 8-bit integer source types.

Note
Check CV_SIMD512 preprocessor definition prior to use. Use vx_load_expand_q version to get maximum available register length result

◆ v512_load_halves()

template<typename _Tp >
v_reg<_Tp, simd512_width / sizeof(_Tp)> cv::v512_load_halves ( const _Tp *  loptr,
const _Tp *  hiptr 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load register contents from two memory blocks.

Parameters
loptrmemory block containing data for first half (0..n/2)
hiptrmemory block containing data for second half (n/2..n)
int lo[4] = { 1, 2, 3, 4, 5, 6, 7, 8 }, hi[4] = { 9, 10, 11, 12, 13, 14, 15, 16 };
Note
Check CV_SIMD512 preprocessor definition prior to use. Use vx_load_halves version to get maximum available register length result

◆ v512_load_low()

template<typename _Tp >
v_reg<_Tp, simd512_width / sizeof(_Tp)> cv::v512_load_low ( const _Tp *  ptr)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load 256-bits of data to lower part (high part is undefined).

Parameters
ptrmemory block containing data for first half (0..n/2)
int lo[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
Note
Check CV_SIMD512 preprocessor definition prior to use. Use vx_load_low version to get maximum available register length result

◆ v512_setall_f32()

v_float32x16 cv::v512_setall_f32 ( float  val)
inline

◆ v512_setall_f64()

v_float64x8 cv::v512_setall_f64 ( double  val)
inline

◆ v512_setall_s16()

v_int16x32 cv::v512_setall_s16 ( short  val)
inline

◆ v512_setall_s32()

v_int32x16 cv::v512_setall_s32 ( int  val)
inline

◆ v512_setall_s64()

v_int64x8 cv::v512_setall_s64 ( int64  val)
inline

◆ v512_setall_s8()

v_int8x64 cv::v512_setall_s8 ( schar  val)
inline

◆ v512_setall_u16()

v_uint16x32 cv::v512_setall_u16 ( ushort  val)
inline

◆ v512_setall_u32()

v_uint32x16 cv::v512_setall_u32 ( unsigned  val)
inline

◆ v512_setall_u64()

v_uint64x8 cv::v512_setall_u64 ( uint64  val)
inline

◆ v512_setall_u8()

v_uint8x64 cv::v512_setall_u8 ( uchar  val)
inline

◆ v512_setzero_f32()

v_float32x16 cv::v512_setzero_f32 ( )
inline

◆ v512_setzero_f64()

v_float64x8 cv::v512_setzero_f64 ( )
inline

◆ v512_setzero_s16()

v_int16x32 cv::v512_setzero_s16 ( )
inline

◆ v512_setzero_s32()

v_int32x16 cv::v512_setzero_s32 ( )
inline

◆ v512_setzero_s64()

v_int64x8 cv::v512_setzero_s64 ( )
inline

◆ v512_setzero_s8()

v_int8x64 cv::v512_setzero_s8 ( )
inline

◆ v512_setzero_u16()

v_uint16x32 cv::v512_setzero_u16 ( )
inline

◆ v512_setzero_u32()

v_uint32x16 cv::v512_setzero_u32 ( )
inline

◆ v512_setzero_u64()

v_uint64x8 cv::v512_setzero_u64 ( )
inline

◆ v512_setzero_u8()

v_uint8x64 cv::v512_setzero_u8 ( )
inline

◆ v_abs()

template<typename _Tp , int n>
v_reg< typename V_TypeTraits<_Tp>::abs_type , n> cv::v_abs ( const v_reg< _Tp, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Absolute value of elements.

Only for floating point types.

◆ v_absdiff() [1/3]

template<typename _Tp , int n>
v_reg<typename V_TypeTraits<_Tp>::abs_type, n> cv::v_absdiff ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Absolute difference.

Returns \( |a - b| \) converted to corresponding unsigned type. Example:

v_int32x4 a, b; // {1, 2, 3, 4} and {4, 3, 2, 1}
v_uint32x4 c = v_absdiff(a, b); // result is {3, 1, 1, 3}

For 8-, 16-, 32-bit integer source types.

◆ v_absdiff() [2/3]

template<int n>
v_reg<float, n> cv::v_absdiff ( const v_reg< float, n > &  a,
const v_reg< float, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

This is an overloaded member function, provided for convenience. It differs from the above function only in what argument(s) it accepts.

For 32-bit floating point values

◆ v_absdiff() [3/3]

template<int n>
v_reg<double, n> cv::v_absdiff ( const v_reg< double, n > &  a,
const v_reg< double, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

This is an overloaded member function, provided for convenience. It differs from the above function only in what argument(s) it accepts.

For 64-bit floating point values

◆ v_absdiffs()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::v_absdiffs ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Saturating absolute difference.

Returns \( saturate(|a - b|) \) . For 8-, 16-bit signed integer source types.

◆ v_add() [1/20]

template<typename... Args>
v_uint8 simd512::v_add ( const v_uint8 f1,
const v_uint8 f2,
const Args &...  vf 
)
inline

◆ v_add() [2/20]

v_uint8 simd512::v_add ( const v_uint8 a,
const v_uint8 b 
)
inline

◆ v_add() [3/20]

v_uint16 simd512::v_add ( const v_uint16 a,
const v_uint16 b 
)
inline

◆ v_add() [4/20]

template<typename... Args>
v_uint16 simd512::v_add ( const v_uint16 f1,
const v_uint16 f2,
const Args &...  vf 
)
inline

◆ v_add() [5/20]

template<typename... Args>
v_uint32 simd512::v_add ( const v_uint32 f1,
const v_uint32 f2,
const Args &...  vf 
)
inline

◆ v_add() [6/20]

v_uint32 simd512::v_add ( const v_uint32 a,
const v_uint32 b 
)
inline

◆ v_add() [7/20]

v_uint64 simd512::v_add ( const v_uint64 a,
const v_uint64 b 
)
inline

◆ v_add() [8/20]

template<typename... Args>
v_uint64 simd512::v_add ( const v_uint64 f1,
const v_uint64 f2,
const Args &...  vf 
)
inline

◆ v_add() [9/20]

v_int8 simd512::v_add ( const v_int8 a,
const v_int8 b 
)
inline

◆ v_add() [10/20]

template<typename... Args>
v_int8 simd512::v_add ( const v_int8 f1,
const v_int8 f2,
const Args &...  vf 
)
inline

◆ v_add() [11/20]

v_int16 simd512::v_add ( const v_int16 a,
const v_int16 b 
)
inline

◆ v_add() [12/20]

template<typename... Args>
v_int16 simd512::v_add ( const v_int16 f1,
const v_int16 f2,
const Args &...  vf 
)
inline

◆ v_add() [13/20]

v_int32 simd512::v_add ( const v_int32 a,
const v_int32 b 
)
inline

◆ v_add() [14/20]

template<typename... Args>
v_int32 simd512::v_add ( const v_int32 f1,
const v_int32 f2,
const Args &...  vf 
)
inline

◆ v_add() [15/20]

v_int64 simd512::v_add ( const v_int64 a,
const v_int64 b 
)
inline

◆ v_add() [16/20]

template<typename... Args>
v_int64 simd512::v_add ( const v_int64 f1,
const v_int64 f2,
const Args &...  vf 
)
inline

◆ v_add() [17/20]

v_float32 simd512::v_add ( const v_float32 a,
const v_float32 b 
)
inline

◆ v_add() [18/20]

template<typename... Args>
v_float32 simd512::v_add ( const v_float32 f1,
const v_float32 f2,
const Args &...  vf 
)
inline

◆ v_add() [19/20]

v_float64 simd512::v_add ( const v_float64 a,
const v_float64 b 
)
inline

◆ v_add() [20/20]

template<typename... Args>
v_float64 simd512::v_add ( const v_float64 f1,
const v_float64 f2,
const Args &...  vf 
)
inline

◆ v_add_wrap()

template<typename _Tp , int n>
v_reg< _Tp , n> cv::v_add_wrap ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Add values without saturation.

For 8- and 16-bit integer values.

◆ v_and() [1/8]

v_uint8 simd512::v_and ( const v_uint8 a,
const v_uint8 b 
)
inline

◆ v_and() [2/8]

v_uint16 simd512::v_and ( const v_uint16 a,
const v_uint16 b 
)
inline

◆ v_and() [3/8]

v_uint32 simd512::v_and ( const v_uint32 a,
const v_uint32 b 
)
inline

◆ v_and() [4/8]

v_uint64 simd512::v_and ( const v_uint64 a,
const v_uint64 b 
)
inline

◆ v_and() [5/8]

v_int8 simd512::v_and ( const v_int8 a,
const v_int8 b 
)
inline

◆ v_and() [6/8]

v_int16 simd512::v_and ( const v_int16 a,
const v_int16 b 
)
inline

◆ v_and() [7/8]

v_int32 simd512::v_and ( const v_int32 a,
const v_int32 b 
)
inline

◆ v_and() [8/8]

v_int64 simd512::v_and ( const v_int64 a,
const v_int64 b 
)
inline

◆ v_broadcast_element()

template<int i, typename _Tp , int n>
v_reg<_Tp, n> cv::v_broadcast_element ( const v_reg< _Tp, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Broadcast i-th element of vector.

Scheme:

{ v[0] v[1] v[2] ... v[SZ] } => { v[i], v[i], v[i] ... v[i] }

Restriction: 0 <= i < nlanes Supported types: 32-bit integers and floats (s32/u32/f32)

◆ v_broadcast_highest() [1/3]

v_uint32 simd512::v_broadcast_highest ( const v_uint32 v)
inline

◆ v_broadcast_highest() [2/3]

v_int32 simd512::v_broadcast_highest ( const v_int32 v)
inline

◆ v_broadcast_highest() [3/3]

v_float32 simd512::v_broadcast_highest ( const v_float32 v)
inline

◆ v_ceil() [1/2]

template<int n>
v_reg<int, n> cv::v_ceil ( const v_reg< float, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Ceil elements.

Ceil each value. Input type is float vector ==> output type is int vector.

Note
Only for floating point types.

◆ v_ceil() [2/2]

template<int n>
v_reg<int, n*2> cv::v_ceil ( const v_reg< double, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

This is an overloaded member function, provided for convenience. It differs from the above function only in what argument(s) it accepts.

◆ v_check_all()

template<typename _Tp , int n>
bool cv::v_check_all ( const v_reg< _Tp, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Check if all packed values are less than zero.

Unsigned values will be casted to signed: uchar 254 => char -2.

◆ v_check_any()

template<typename _Tp , int n>
bool cv::v_check_any ( const v_reg< _Tp, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Check if any of packed values is less than zero.

Unsigned values will be casted to signed: uchar 254 => char -2.

◆ v_cleanup()

void cv::v_cleanup ( )
inline

◆ v_combine_high()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::v_combine_high ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Combine vector from last elements of two vectors.

Scheme:

{A1 A2 A3 A4}
{B1 B2 B3 B4}
---------------
{A3 A4 B3 B4}

For all types except 64-bit.

◆ v_combine_low()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::v_combine_low ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Combine vector from first elements of two vectors.

Scheme:

{A1 A2 A3 A4}
{B1 B2 B3 B4}
---------------
{A1 A2 B1 B2}

For all types except 64-bit.

◆ v_cvt_f32() [1/3]

template<int n>
v_reg<float, n> cv::v_cvt_f32 ( const v_reg< int, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Convert to float.

Supported input type is cv::v_int32.

◆ v_cvt_f32() [2/3]

template<int n>
v_reg<float, n*2> cv::v_cvt_f32 ( const v_reg< double, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Convert lower half to float.

Supported input type is cv::v_float64.

◆ v_cvt_f32() [3/3]

template<int n>
v_reg<float, n*2> cv::v_cvt_f32 ( const v_reg< double, n > &  a,
const v_reg< double, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Convert to float.

Supported input type is cv::v_float64.

◆ v_cvt_f64() [1/3]

template<int n>
v_reg<double, n/2> cv::v_cvt_f64 ( const v_reg< int, n > &  a)

#include <opencv2/core/hal/intrin_cpp.hpp>

Convert lower half to double.

Supported input type is cv::v_int32.

◆ v_cvt_f64() [2/3]

template<int n>
v_reg<double, (n/2)> cv::v_cvt_f64 ( const v_reg< float, n > &  a)

#include <opencv2/core/hal/intrin_cpp.hpp>

Convert lower half to double.

Supported input type is cv::v_float32.

◆ v_cvt_f64() [3/3]

template<int n>
v_reg<double, n> cv::v_cvt_f64 ( const v_reg< int64, n > &  a)

#include <opencv2/core/hal/intrin_cpp.hpp>

Convert to double.

Supported input type is cv::v_int64.

◆ v_cvt_f64_high() [1/2]

template<int n>
v_reg<double, (n/2)> cv::v_cvt_f64_high ( const v_reg< int, n > &  a)

#include <opencv2/core/hal/intrin_cpp.hpp>

Convert to double high part of vector.

Supported input type is cv::v_int32.

◆ v_cvt_f64_high() [2/2]

template<int n>
v_reg<double, (n/2)> cv::v_cvt_f64_high ( const v_reg< float, n > &  a)

#include <opencv2/core/hal/intrin_cpp.hpp>

Convert to double high part of vector.

Supported input type is cv::v_float32.

◆ v_div() [1/2]

v_float32 simd512::v_div ( const v_float32 a,
const v_float32 b 
)
inline

◆ v_div() [2/2]

v_float64 simd512::v_div ( const v_float64 a,
const v_float64 b 
)
inline

◆ v_dotprod() [1/2]

template<typename _Tp , int n>
v_reg<typename V_TypeTraits<_Tp>::w_type, n/2> cv::v_dotprod ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Dot product of elements.

Multiply values in two registers and sum adjacent result pairs.

Scheme:

{A1 A2 ...} // 16-bit
x {B1 B2 ...} // 16-bit
-------------
{A1B1+A2B2 ...} // 32-bit

◆ v_dotprod() [2/2]

template<typename _Tp , int n>
v_reg<typename V_TypeTraits<_Tp>::w_type, n/2> cv::v_dotprod ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b,
const v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > &  c 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Dot product of elements.

Same as cv::v_dotprod, but add a third element to the sum of adjacent pairs. Scheme:

{A1 A2 ...} // 16-bit
x {B1 B2 ...} // 16-bit
-------------
{A1B1+A2B2+C1 ...} // 32-bit

◆ v_dotprod_expand() [1/4]

template<typename _Tp , int n>
v_reg<typename V_TypeTraits<_Tp>::q_type, n/4> cv::v_dotprod_expand ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Dot product of elements and expand.

Multiply values in two registers and expand the sum of adjacent result pairs.

Scheme:

{A1 A2 A3 A4 ...} // 8-bit
x {B1 B2 B3 B4 ...} // 8-bit
-------------
{A1B1+A2B2+A3B3+A4B4 ...} // 32-bit

◆ v_dotprod_expand() [2/4]

template<typename _Tp , int n>
v_reg<typename V_TypeTraits<_Tp>::q_type, n/4> cv::v_dotprod_expand ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b,
const v_reg< typename V_TypeTraits< _Tp >::q_type, n/4 > &  c 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Dot product of elements.

Same as cv::v_dotprod_expand, but add a third element to the sum of adjacent pairs. Scheme:

{A1 A2 A3 A4 ...} // 8-bit
x {B1 B2 B3 B4 ...} // 8-bit
-------------
{A1B1+A2B2+A3B3+A4B4+C1 ...} // 32-bit

◆ v_dotprod_expand() [3/4]

template<int n>
v_reg<double, n/2> cv::v_dotprod_expand ( const v_reg< int, n > &  a,
const v_reg< int, n > &  b 
)
inline

◆ v_dotprod_expand() [4/4]

template<int n>
v_reg<double, n/2> cv::v_dotprod_expand ( const v_reg< int, n > &  a,
const v_reg< int, n > &  b,
const v_reg< double, n/2 > &  c 
)
inline

◆ v_dotprod_expand_fast() [1/4]

template<typename _Tp , int n>
v_reg<typename V_TypeTraits<_Tp>::q_type, n/4> cv::v_dotprod_expand_fast ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Fast Dot product of elements and expand.

Multiply values in two registers and expand the sum of adjacent result pairs.

Same as cv::v_dotprod_expand, but it may perform unorder sum between result pairs in some platforms, this intrinsic can be used if the sum among all lanes is only matters and also it should be yielding better performance on the affected platforms.

◆ v_dotprod_expand_fast() [2/4]

template<typename _Tp , int n>
v_reg<typename V_TypeTraits<_Tp>::q_type, n/4> cv::v_dotprod_expand_fast ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b,
const v_reg< typename V_TypeTraits< _Tp >::q_type, n/4 > &  c 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Fast Dot product of elements.

Same as cv::v_dotprod_expand_fast, but add a third element to the sum of adjacent pairs.

◆ v_dotprod_expand_fast() [3/4]

template<int n>
v_reg<double, n/2> cv::v_dotprod_expand_fast ( const v_reg< int, n > &  a,
const v_reg< int, n > &  b 
)
inline

◆ v_dotprod_expand_fast() [4/4]

template<int n>
v_reg<double, n/2> cv::v_dotprod_expand_fast ( const v_reg< int, n > &  a,
const v_reg< int, n > &  b,
const v_reg< double, n/2 > &  c 
)
inline

◆ v_dotprod_fast() [1/2]

template<typename _Tp , int n>
v_reg<typename V_TypeTraits<_Tp>::w_type, n/2> cv::v_dotprod_fast ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Fast Dot product of elements.

Same as cv::v_dotprod, but it may perform unorder sum between result pairs in some platforms, this intrinsic can be used if the sum among all lanes is only matters and also it should be yielding better performance on the affected platforms.

◆ v_dotprod_fast() [2/2]

template<typename _Tp , int n>
v_reg<typename V_TypeTraits<_Tp>::w_type, n/2> cv::v_dotprod_fast ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b,
const v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > &  c 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Fast Dot product of elements.

Same as cv::v_dotprod_fast, but add a third element to the sum of adjacent pairs.

◆ v_eq() [1/8]

v_uint8 simd512::v_eq ( const v_uint8 a,
const v_uint8 b 
)
inline

◆ v_eq() [2/8]

v_uint16 simd512::v_eq ( const v_uint16 a,
const v_uint16 b 
)
inline

◆ v_eq() [3/8]

v_uint32 simd512::v_eq ( const v_uint32 a,
const v_uint32 b 
)
inline

◆ v_eq() [4/8]

v_int8 simd512::v_eq ( const v_int8 a,
const v_int8 b 
)
inline

◆ v_eq() [5/8]

v_int16 simd512::v_eq ( const v_int16 a,
const v_int16 b 
)
inline

◆ v_eq() [6/8]

v_int32 simd512::v_eq ( const v_int32 a,
const v_int32 b 
)
inline

◆ v_eq() [7/8]

v_float32 simd512::v_eq ( const v_float32 a,
const v_float32 b 
)
inline

◆ v_eq() [8/8]

v_float64 simd512::v_eq ( const v_float64 a,
const v_float64 b 
)
inline

◆ v_expand()

template<typename _Tp , int n>
void cv::v_expand ( const v_reg< _Tp, n > &  a,
v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > &  b0,
v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > &  b1 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Expand values to the wider pack type.

Copy contents of register to two registers with 2x wider pack type. Scheme:

int32x4 int64x2 int64x2
{A B C D} ==> {A B} , {C D}

◆ v_expand_high()

template<typename _Tp , int n>
v_reg<typename V_TypeTraits<_Tp>::w_type, n/2> cv::v_expand_high ( const v_reg< _Tp, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Expand higher values to the wider pack type.

Same as cv::v_expand_low, but expand higher half of the vector instead.

Scheme:

int32x4 int64x2
{A B C D} ==> {C D}

◆ v_expand_low()

template<typename _Tp , int n>
v_reg<typename V_TypeTraits<_Tp>::w_type, n/2> cv::v_expand_low ( const v_reg< _Tp, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Expand lower values to the wider pack type.

Same as cv::v_expand, but return lower half of the vector.

Scheme:

int32x4 int64x2
{A B C D} ==> {A B}

◆ v_extract()

template<int s, typename _Tp , int n>
v_reg<_Tp, n> cv::v_extract ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Vector extract.

Scheme:

{A1 A2 A3 A4}
{B1 B2 B3 B4}
========================
shift = 1 {A2 A3 A4 B1}
shift = 2 {A3 A4 B1 B2}
shift = 3 {A4 B1 B2 B3}

Restriction: 0 <= shift < nlanes

Usage:

v_int32x4 a, b, c;
c = v_extract<2>(a, b);

For all types.

◆ v_extract_highest() [1/10]

uchar simd512::v_extract_highest ( const v_uint8 v)
inline

◆ v_extract_highest() [2/10]

schar simd512::v_extract_highest ( const v_int8 v)
inline

◆ v_extract_highest() [3/10]

ushort simd512::v_extract_highest ( const v_uint16 v)
inline

◆ v_extract_highest() [4/10]

short simd512::v_extract_highest ( const v_int16 v)
inline

◆ v_extract_highest() [5/10]

unsigned int simd512::v_extract_highest ( const v_uint32 v)
inline

◆ v_extract_highest() [6/10]

int simd512::v_extract_highest ( const v_int32 v)
inline

◆ v_extract_highest() [7/10]

uint64 simd512::v_extract_highest ( const v_uint64 v)
inline

◆ v_extract_highest() [8/10]

int64 simd512::v_extract_highest ( const v_int64 v)
inline

◆ v_extract_highest() [9/10]

float simd512::v_extract_highest ( const v_float32 v)
inline

◆ v_extract_highest() [10/10]

double simd512::v_extract_highest ( const v_float64 v)
inline

◆ v_extract_n()

template<int s, typename _Tp , int n>
_Tp cv::v_extract_n ( const v_reg< _Tp, n > &  v)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Vector extract.

Scheme: Return the s-th element of v. Restriction: 0 <= s < nlanes

Usage:

int r;
r = v_extract_n<2>(a);

For all types.

◆ v_floor() [1/2]

template<int n>
v_reg<int, n> cv::v_floor ( const v_reg< float, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Floor elements.

Floor each value. Input type is float vector ==> output type is int vector.

Note
Only for floating point types.

◆ v_floor() [2/2]

template<int n>
v_reg<int, n*2> cv::v_floor ( const v_reg< double, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

This is an overloaded member function, provided for convenience. It differs from the above function only in what argument(s) it accepts.

◆ v_fma()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::v_fma ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b,
const v_reg< _Tp, n > &  c 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Multiply and add.

Returns \( a*b + c \) For floating point types and signed 32bit int only.

◆ v_ge() [1/8]

v_uint8 simd512::v_ge ( const v_uint8 a,
const v_uint8 b 
)
inline

◆ v_ge() [2/8]

v_uint16 simd512::v_ge ( const v_uint16 a,
const v_uint16 b 
)
inline

◆ v_ge() [3/8]

v_uint32 simd512::v_ge ( const v_uint32 a,
const v_uint32 b 
)
inline

◆ v_ge() [4/8]

v_int8 simd512::v_ge ( const v_int8 a,
const v_int8 b 
)
inline

◆ v_ge() [5/8]

v_int16 simd512::v_ge ( const v_int16 a,
const v_int16 b 
)
inline

◆ v_ge() [6/8]

v_int32 simd512::v_ge ( const v_int32 a,
const v_int32 b 
)
inline

◆ v_ge() [7/8]

v_float32 simd512::v_ge ( const v_float32 a,
const v_float32 b 
)
inline

◆ v_ge() [8/8]

v_float64 simd512::v_ge ( const v_float64 a,
const v_float64 b 
)
inline

◆ v_get0() [1/10]

uchar simd512::v_get0 ( const v_uint8 v)
inline

◆ v_get0() [2/10]

schar simd512::v_get0 ( const v_int8 v)
inline

◆ v_get0() [3/10]

ushort simd512::v_get0 ( const v_uint16 v)
inline

◆ v_get0() [4/10]

short simd512::v_get0 ( const v_int16 v)
inline

◆ v_get0() [5/10]

unsigned simd512::v_get0 ( const v_uint32 v)
inline

◆ v_get0() [6/10]

int simd512::v_get0 ( const v_int32 v)
inline

◆ v_get0() [7/10]

uint64 simd512::v_get0 ( const v_uint64 v)
inline

◆ v_get0() [8/10]

int64 simd512::v_get0 ( const v_int64 v)
inline

◆ v_get0() [9/10]

float simd512::v_get0 ( const v_float32 v)
inline

◆ v_get0() [10/10]

double simd512::v_get0 ( const v_float64 v)
inline

◆ v_gt() [1/8]

v_uint8 simd512::v_gt ( const v_uint8 a,
const v_uint8 b 
)
inline

◆ v_gt() [2/8]

v_uint16 simd512::v_gt ( const v_uint16 a,
const v_uint16 b 
)
inline

◆ v_gt() [3/8]

v_uint32 simd512::v_gt ( const v_uint32 a,
const v_uint32 b 
)
inline

◆ v_gt() [4/8]

v_int8 simd512::v_gt ( const v_int8 a,
const v_int8 b 
)
inline

◆ v_gt() [5/8]

v_int16 simd512::v_gt ( const v_int16 a,
const v_int16 b 
)
inline

◆ v_gt() [6/8]

v_int32 simd512::v_gt ( const v_int32 a,
const v_int32 b 
)
inline

◆ v_gt() [7/8]

v_float32 simd512::v_gt ( const v_float32 a,
const v_float32 b 
)
inline

◆ v_gt() [8/8]

v_float64 simd512::v_gt ( const v_float64 a,
const v_float64 b 
)
inline

◆ v_interleave_pairs()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::v_interleave_pairs ( const v_reg< _Tp, n > &  vec)
inline

◆ v_interleave_quads()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::v_interleave_quads ( const v_reg< _Tp, n > &  vec)
inline

◆ v_invsqrt()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::v_invsqrt ( const v_reg< _Tp, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Inversed square root.

Returns \( 1/sqrt(a) \) For floating point types only.

◆ v_le() [1/8]

v_uint8 simd512::v_le ( const v_uint8 a,
const v_uint8 b 
)
inline

◆ v_le() [2/8]

v_uint16 simd512::v_le ( const v_uint16 a,
const v_uint16 b 
)
inline

◆ v_le() [3/8]

v_uint32 simd512::v_le ( const v_uint32 a,
const v_uint32 b 
)
inline

◆ v_le() [4/8]

v_int8 simd512::v_le ( const v_int8 a,
const v_int8 b 
)
inline

◆ v_le() [5/8]

v_int16 simd512::v_le ( const v_int16 a,
const v_int16 b 
)
inline

◆ v_le() [6/8]

v_int32 simd512::v_le ( const v_int32 a,
const v_int32 b 
)
inline

◆ v_le() [7/8]

v_float32 simd512::v_le ( const v_float32 a,
const v_float32 b 
)
inline

◆ v_le() [8/8]

v_float64 simd512::v_le ( const v_float64 a,
const v_float64 b 
)
inline

◆ v_load()

template<typename _Tp >
v_reg<_Tp, simd128_width / sizeof(_Tp)> cv::v_load ( const _Tp *  ptr)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load register contents from memory.

Parameters
ptrpointer to memory block with data
Returns
register object
Note
Returned type will be detected from passed pointer type, for example uchar ==> cv::v_uint8x16, int ==> cv::v_int32x4, etc.
Use vx_load version to get maximum available register length result
Alignment requirement: if CV_STRONG_ALIGNMENT=1 then passed pointer must be aligned (sizeof(lane type) should be enough). Do not cast pointer types without runtime check for pointer alignment (like uchar* => int*).

◆ v_load_aligned()

template<typename _Tp >
v_reg<_Tp, simd128_width / sizeof(_Tp)> cv::v_load_aligned ( const _Tp *  ptr)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load register contents from memory (aligned)

similar to cv::v_load, but source memory block should be aligned (to 16-byte boundary in case of SIMD128, 32-byte - SIMD256, etc)

Note
Use vx_load_aligned version to get maximum available register length result

◆ v_load_deinterleave() [1/3]

template<typename _Tp , int n>
void cv::v_load_deinterleave ( const _Tp *  ptr,
v_reg< _Tp, n > &  a,
v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load and deinterleave (2 channels)

Load data from memory deinterleave and store to 2 registers. Scheme:

{A1 B1 A2 B2 ...} ==> {A1 A2 ...}, {B1 B2 ...}

For all types except 64-bit.

◆ v_load_deinterleave() [2/3]

template<typename _Tp , int n>
void cv::v_load_deinterleave ( const _Tp *  ptr,
v_reg< _Tp, n > &  a,
v_reg< _Tp, n > &  b,
v_reg< _Tp, n > &  c 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load and deinterleave (3 channels)

Load data from memory deinterleave and store to 3 registers. Scheme:

{A1 B1 C1 A2 B2 C2 ...} ==> {A1 A2 ...}, {B1 B2 ...}, {C1 C2 ...}

For all types except 64-bit.

◆ v_load_deinterleave() [3/3]

template<typename _Tp , int n>
void cv::v_load_deinterleave ( const _Tp *  ptr,
v_reg< _Tp, n > &  a,
v_reg< _Tp, n > &  b,
v_reg< _Tp, n > &  c,
v_reg< _Tp, n > &  d 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load and deinterleave (4 channels)

Load data from memory deinterleave and store to 4 registers. Scheme:

{A1 B1 C1 D1 A2 B2 C2 D2 ...} ==> {A1 A2 ...}, {B1 B2 ...}, {C1 C2 ...}, {D1 D2 ...}

For all types except 64-bit.

◆ v_load_expand() [1/2]

template<typename _Tp >
v_reg<typename V_TypeTraits<_Tp>::w_type, simd128_width / sizeof(typename V_TypeTraits<_Tp>::w_type)> cv::v_load_expand ( const _Tp *  ptr)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load register contents from memory with double expand.

Same as cv::v_load, but result pack type will be 2x wider than memory type.

short buf[4] = {1, 2, 3, 4}; // type is int16
v_int32x4 r = v_load_expand(buf); // r = {1, 2, 3, 4} - type is int32

For 8-, 16-, 32-bit integer source types.

Note
Use vx_load_expand version to get maximum available register length result

◆ v_load_expand() [2/2]

v_float32 cv::v_load_expand ( const float16_t ptr)
inline

◆ v_load_expand_q()

template<typename _Tp >
v_reg<typename V_TypeTraits<_Tp>::q_type, simd128_width / sizeof(typename V_TypeTraits<_Tp>::q_type)> cv::v_load_expand_q ( const _Tp *  ptr)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load register contents from memory with quad expand.

Same as cv::v_load_expand, but result type is 4 times wider than source.

char buf[4] = {1, 2, 3, 4}; // type is int8
v_int32x4 r = v_load_expand_q(buf); // r = {1, 2, 3, 4} - type is int32

For 8-bit integer source types.

Note
Use vx_load_expand_q version to get maximum available register length result

◆ v_load_halves()

template<typename _Tp >
v_reg<_Tp, simd128_width / sizeof(_Tp)> cv::v_load_halves ( const _Tp *  loptr,
const _Tp *  hiptr 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load register contents from two memory blocks.

Parameters
loptrmemory block containing data for first half (0..n/2)
hiptrmemory block containing data for second half (n/2..n)
int lo[2] = { 1, 2 }, hi[2] = { 3, 4 };
Note
Use vx_load_halves version to get maximum available register length result

◆ v_load_low()

template<typename _Tp >
v_reg<_Tp, simd128_width / sizeof(_Tp)> cv::v_load_low ( const _Tp *  ptr)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Load 64-bits of data to lower part (high part is undefined).

Parameters
ptrmemory block containing data for first half (0..n/2)
int lo[2] = { 1, 2 };
Note
Use vx_load_low version to get maximum available register length result

◆ v_lt() [1/8]

v_uint8 simd512::v_lt ( const v_uint8 a,
const v_uint8 b 
)
inline

◆ v_lt() [2/8]

v_uint16 simd512::v_lt ( const v_uint16 a,
const v_uint16 b 
)
inline

◆ v_lt() [3/8]

v_uint32 simd512::v_lt ( const v_uint32 a,
const v_uint32 b 
)
inline

◆ v_lt() [4/8]

v_int8 simd512::v_lt ( const v_int8 a,
const v_int8 b 
)
inline

◆ v_lt() [5/8]

v_int16 simd512::v_lt ( const v_int16 a,
const v_int16 b 
)
inline

◆ v_lt() [6/8]

v_int32 simd512::v_lt ( const v_int32 a,
const v_int32 b 
)
inline

◆ v_lt() [7/8]

v_float32 simd512::v_lt ( const v_float32 a,
const v_float32 b 
)
inline

◆ v_lt() [8/8]

v_float64 simd512::v_lt ( const v_float64 a,
const v_float64 b 
)
inline

◆ v_lut() [1/5]

template<typename _Tp >
v_reg<_Tp, simd128_width / sizeof(_Tp)> cv::v_lut ( const _Tp *  tab,
const int *  idx 
)
inline

◆ v_lut() [2/5]

template<int n>
v_reg<int, n> cv::v_lut ( const int *  tab,
const v_reg< int, n > &  idx 
)
inline

◆ v_lut() [3/5]

template<int n>
v_reg<unsigned, n> cv::v_lut ( const unsigned *  tab,
const v_reg< int, n > &  idx 
)
inline

◆ v_lut() [4/5]

template<int n>
v_reg<float, n> cv::v_lut ( const float *  tab,
const v_reg< int, n > &  idx 
)
inline

◆ v_lut() [5/5]

template<int n>
v_reg<double, n/2> cv::v_lut ( const double *  tab,
const v_reg< int, n > &  idx 
)
inline

◆ v_lut_deinterleave() [1/2]

template<int n>
void cv::v_lut_deinterleave ( const float *  tab,
const v_reg< int, n > &  idx,
v_reg< float, n > &  x,
v_reg< float, n > &  y 
)
inline

◆ v_lut_deinterleave() [2/2]

template<int n>
void cv::v_lut_deinterleave ( const double *  tab,
const v_reg< int, n *2 > &  idx,
v_reg< double, n > &  x,
v_reg< double, n > &  y 
)
inline

◆ v_lut_pairs()

template<typename _Tp >
v_reg<_Tp, simd128_width / sizeof(_Tp)> cv::v_lut_pairs ( const _Tp *  tab,
const int *  idx 
)
inline

◆ v_lut_quads()

template<typename _Tp >
v_reg<_Tp, simd128_width / sizeof(_Tp)> cv::v_lut_quads ( const _Tp *  tab,
const int *  idx 
)
inline

◆ v_magnitude()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::v_magnitude ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Magnitude.

Returns \( sqrt(a^2 + b^2) \) For floating point types only.

◆ v_matmul()

template<int n>
v_reg<float, n> cv::v_matmul ( const v_reg< float, n > &  v,
const v_reg< float, n > &  a,
const v_reg< float, n > &  b,
const v_reg< float, n > &  c,
const v_reg< float, n > &  d 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Matrix multiplication.

Scheme:

{A0 A1 A2 A3} |V0|
{B0 B1 B2 B3} |V1|
{C0 C1 C2 C3} |V2|
{D0 D1 D2 D3} x |V3|
====================
{R0 R1 R2 R3}, where:
R0 = A0V0 + B0V1 + C0V2 + D0V3,
R1 = A1V0 + B1V1 + C1V2 + D1V3
...

◆ v_matmuladd()

template<int n>
v_reg<float, n> cv::v_matmuladd ( const v_reg< float, n > &  v,
const v_reg< float, n > &  a,
const v_reg< float, n > &  b,
const v_reg< float, n > &  c,
const v_reg< float, n > &  d 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Matrix multiplication and add.

Scheme:

{A0 A1 A2 A3} |V0| |D0|
{B0 B1 B2 B3} |V1| |D1|
{C0 C1 C2 C3} x |V2| + |D2|
==================== |D3|
{R0 R1 R2 R3}, where:
R0 = A0V0 + B0V1 + C0V2 + D0,
R1 = A1V0 + B1V1 + C1V2 + D1
...

◆ v_max()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::v_max ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Choose max values for each pair.

Scheme:

{A1 A2 ...}
{B1 B2 ...}
--------------
{max(A1,B1) max(A2,B2) ...}

For all types except 64-bit integer.

◆ v_min()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::v_min ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Choose min values for each pair.

Scheme:

{A1 A2 ...}
{B1 B2 ...}
--------------
{min(A1,B1) min(A2,B2) ...}

For all types except 64-bit integer.

◆ v_mul() [1/16]

template<typename... Args>
v_uint8 simd512::v_mul ( const v_uint8 f1,
const v_uint8 f2,
const Args &...  vf 
)
inline

◆ v_mul() [2/16]

v_uint8 simd512::v_mul ( const v_uint8 a,
const v_uint8 b 
)
inline

◆ v_mul() [3/16]

template<typename... Args>
v_int8 simd512::v_mul ( const v_int8 f1,
const v_int8 f2,
const Args &...  vf 
)
inline

◆ v_mul() [4/16]

v_int8 simd512::v_mul ( const v_int8 a,
const v_int8 b 
)
inline

◆ v_mul() [5/16]

v_uint16 simd512::v_mul ( const v_uint16 a,
const v_uint16 b 
)
inline

◆ v_mul() [6/16]

template<typename... Args>
v_uint16 simd512::v_mul ( const v_uint16 f1,
const v_uint16 f2,
const Args &...  vf 
)
inline

◆ v_mul() [7/16]

v_uint32 simd512::v_mul ( const v_uint32 a,
const v_uint32 b 
)
inline

◆ v_mul() [8/16]

template<typename... Args>
v_uint32 simd512::v_mul ( const v_uint32 f1,
const v_uint32 f2,
const Args &...  vf 
)
inline

◆ v_mul() [9/16]

template<typename... Args>
v_int16 simd512::v_mul ( const v_int16 f1,
const v_int16 f2,
const Args &...  vf 
)
inline

◆ v_mul() [10/16]

v_int16 simd512::v_mul ( const v_int16 a,
const v_int16 b 
)
inline

◆ v_mul() [11/16]

v_int32 simd512::v_mul ( const v_int32 a,
const v_int32 b 
)
inline

◆ v_mul() [12/16]

template<typename... Args>
v_int32 simd512::v_mul ( const v_int32 f1,
const v_int32 f2,
const Args &...  vf 
)
inline

◆ v_mul() [13/16]

template<typename... Args>
v_float32 simd512::v_mul ( const v_float32 f1,
const v_float32 f2,
const Args &...  vf 
)
inline

◆ v_mul() [14/16]

v_float32 simd512::v_mul ( const v_float32 a,
const v_float32 b 
)
inline

◆ v_mul() [15/16]

template<typename... Args>
v_float64 simd512::v_mul ( const v_float64 f1,
const v_float64 f2,
const Args &...  vf 
)
inline

◆ v_mul() [16/16]

v_float64 simd512::v_mul ( const v_float64 a,
const v_float64 b 
)
inline

◆ v_mul_expand()

template<typename _Tp , int n>
void cv::v_mul_expand ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b,
v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > &  c,
v_reg< typename V_TypeTraits< _Tp >::w_type, n/2 > &  d 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Multiply and expand.

Multiply values two registers and store results in two registers with wider pack type. Scheme:

{A B C D} // 32-bit
x {E F G H} // 32-bit
---------------
{AE BF} // 64-bit
{CG DH} // 64-bit

Example:

v_uint32x4 a, b; // {1,2,3,4} and {2,2,2,2}
v_uint64x2 c, d; // results
v_mul_expand(a, b, c, d); // c, d = {2,4}, {6, 8}

Implemented only for 16- and unsigned 32-bit source types (v_int16x8, v_uint16x8, v_uint32x4).

◆ v_mul_hi()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::v_mul_hi ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Multiply and extract high part.

Multiply values two registers and store high part of the results. Implemented only for 16-bit source types (v_int16x8, v_uint16x8). Returns \( a*b >> 16 \)

◆ v_mul_wrap()

template<typename _Tp , int n>
v_reg< _Tp , n> cv::v_mul_wrap ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Multiply values without saturation.

For 8- and 16-bit integer values.

◆ v_muladd()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::v_muladd ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b,
const v_reg< _Tp, n > &  c 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

A synonym for v_fma.

◆ v_ne() [1/8]

v_uint8 simd512::v_ne ( const v_uint8 a,
const v_uint8 b 
)
inline

◆ v_ne() [2/8]

v_uint16 simd512::v_ne ( const v_uint16 a,
const v_uint16 b 
)
inline

◆ v_ne() [3/8]

v_uint32 simd512::v_ne ( const v_uint32 a,
const v_uint32 b 
)
inline

◆ v_ne() [4/8]

v_int8 simd512::v_ne ( const v_int8 a,
const v_int8 b 
)
inline

◆ v_ne() [5/8]

v_int16 simd512::v_ne ( const v_int16 a,
const v_int16 b 
)
inline

◆ v_ne() [6/8]

v_int32 simd512::v_ne ( const v_int32 a,
const v_int32 b 
)
inline

◆ v_ne() [7/8]

v_float32 simd512::v_ne ( const v_float32 a,
const v_float32 b 
)
inline

◆ v_ne() [8/8]

v_float64 simd512::v_ne ( const v_float64 a,
const v_float64 b 
)
inline

◆ v_not() [1/8]

v_uint8 simd512::v_not ( const v_uint8 a)
inline

◆ v_not() [2/8]

v_uint16 simd512::v_not ( const v_uint16 a)
inline

◆ v_not() [3/8]

v_uint32 simd512::v_not ( const v_uint32 a)
inline

◆ v_not() [4/8]

v_uint64 simd512::v_not ( const v_uint64 a)
inline

◆ v_not() [5/8]

v_int8 simd512::v_not ( const v_int8 a)
inline

◆ v_not() [6/8]

v_int16 simd512::v_not ( const v_int16 a)
inline

◆ v_not() [7/8]

v_int32 simd512::v_not ( const v_int32 a)
inline

◆ v_not() [8/8]

v_int64 simd512::v_not ( const v_int64 a)
inline

◆ v_not_nan() [1/2]

template<int n>
v_reg<float, n> cv::v_not_nan ( const v_reg< float, n > &  a)
inline

◆ v_not_nan() [2/2]

template<int n>
v_reg<double, n> cv::v_not_nan ( const v_reg< double, n > &  a)
inline

◆ v_or() [1/8]

v_uint8 simd512::v_or ( const v_uint8 a,
const v_uint8 b 
)
inline

◆ v_or() [2/8]

v_uint16 simd512::v_or ( const v_uint16 a,
const v_uint16 b 
)
inline

◆ v_or() [3/8]

v_uint32 simd512::v_or ( const v_uint32 a,
const v_uint32 b 
)
inline

◆ v_or() [4/8]

v_uint64 simd512::v_or ( const v_uint64 a,
const v_uint64 b 
)
inline

◆ v_or() [5/8]

v_int8 simd512::v_or ( const v_int8 a,
const v_int8 b 
)
inline

◆ v_or() [6/8]

v_int16 simd512::v_or ( const v_int16 a,
const v_int16 b 
)
inline

◆ v_or() [7/8]

v_int32 simd512::v_or ( const v_int32 a,
const v_int32 b 
)
inline

◆ v_or() [8/8]

v_int64 simd512::v_or ( const v_int64 a,
const v_int64 b 
)
inline

◆ v_pack() [1/6]

template<int n>
v_reg< uchar , 2*n> cv::v_pack ( const v_reg< ushort, n > &  a,
const v_reg< ushort, n > &  b 
)
inline

◆ v_pack() [2/6]

template<int n>
v_reg< schar , 2*n> cv::v_pack ( const v_reg< short, n > &  a,
const v_reg< short, n > &  b 
)
inline

◆ v_pack() [3/6]

template<int n>
v_reg< ushort , 2*n> cv::v_pack ( const v_reg< unsigned, n > &  a,
const v_reg< unsigned, n > &  b 
)
inline

◆ v_pack() [4/6]

template<int n>
v_reg< short , 2*n> cv::v_pack ( const v_reg< int, n > &  a,
const v_reg< int, n > &  b 
)
inline

◆ v_pack() [5/6]

template<int n>
v_reg< unsigned , 2*n> cv::v_pack ( const v_reg< uint64, n > &  a,
const v_reg< uint64, n > &  b 
)
inline

◆ v_pack() [6/6]

template<int n>
v_reg< int , 2*n> cv::v_pack ( const v_reg< int64, n > &  a,
const v_reg< int64, n > &  b 
)
inline

◆ v_pack_b() [1/3]

template<int n>
v_reg<uchar, 2*n> cv::v_pack_b ( const v_reg< ushort, n > &  a,
const v_reg< ushort, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

! For 16-bit boolean values

Scheme:

a {0xFFFF 0 0 0xFFFF 0 0xFFFF 0xFFFF 0}
b {0xFFFF 0 0xFFFF 0 0 0xFFFF 0 0xFFFF}
===============
{
0xFF 0 0 0xFF 0 0xFF 0xFF 0
0xFF 0 0xFF 0 0 0xFF 0 0xFF
}

◆ v_pack_b() [2/3]

template<int n>
v_reg<uchar, 4*n> cv::v_pack_b ( const v_reg< unsigned, n > &  a,
const v_reg< unsigned, n > &  b,
const v_reg< unsigned, n > &  c,
const v_reg< unsigned, n > &  d 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

This is an overloaded member function, provided for convenience. It differs from the above function only in what argument(s) it accepts. For 32-bit boolean values

Scheme:

a {0xFFFF.. 0 0 0xFFFF..}
b {0 0xFFFF.. 0xFFFF.. 0}
c {0xFFFF.. 0 0xFFFF.. 0}
d {0 0xFFFF.. 0 0xFFFF..}
===============
{
0xFF 0 0 0xFF 0 0xFF 0xFF 0
0xFF 0 0xFF 0 0 0xFF 0 0xFF
}

◆ v_pack_b() [3/3]

template<int n>
v_reg<uchar, 8*n> cv::v_pack_b ( const v_reg< uint64, n > &  a,
const v_reg< uint64, n > &  b,
const v_reg< uint64, n > &  c,
const v_reg< uint64, n > &  d,
const v_reg< uint64, n > &  e,
const v_reg< uint64, n > &  f,
const v_reg< uint64, n > &  g,
const v_reg< uint64, n > &  h 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

This is an overloaded member function, provided for convenience. It differs from the above function only in what argument(s) it accepts. For 64-bit boolean values

Scheme:

a {0xFFFF.. 0}
b {0 0xFFFF..}
c {0xFFFF.. 0}
d {0 0xFFFF..}
e {0xFFFF.. 0}
f {0xFFFF.. 0}
g {0 0xFFFF..}
h {0 0xFFFF..}
===============
{
0xFF 0 0 0xFF 0xFF 0 0 0xFF
0xFF 0 0xFF 0 0 0xFF 0 0xFF
}

◆ v_pack_store() [1/7]

template<int n>
void cv::v_pack_store ( uchar ptr,
const v_reg< ushort, n > &  a 
)
inline

◆ v_pack_store() [2/7]

template<int n>
void cv::v_pack_store ( schar ptr,
const v_reg< short, n > &  a 
)
inline

◆ v_pack_store() [3/7]

template<int n>
void cv::v_pack_store ( ushort ptr,
const v_reg< unsigned, n > &  a 
)
inline

◆ v_pack_store() [4/7]

template<int n>
void cv::v_pack_store ( short *  ptr,
const v_reg< int, n > &  a 
)
inline

◆ v_pack_store() [5/7]

template<int n>
void cv::v_pack_store ( unsigned *  ptr,
const v_reg< uint64, n > &  a 
)
inline

◆ v_pack_store() [6/7]

template<int n>
void cv::v_pack_store ( int *  ptr,
const v_reg< int64, n > &  a 
)
inline

◆ v_pack_store() [7/7]

template<int n>
void cv::v_pack_store ( float16_t ptr,
const v_reg< float, n > &  v 
)
inline

◆ v_pack_triplets()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::v_pack_triplets ( const v_reg< _Tp, n > &  vec)
inline

◆ v_pack_u() [1/2]

template<int n>
v_reg< uchar , 2*n> cv::v_pack_u ( const v_reg< short, n > &  a,
const v_reg< short, n > &  b 
)
inline

◆ v_pack_u() [2/2]

template<int n>
v_reg< ushort , 2*n> cv::v_pack_u ( const v_reg< int, n > &  a,
const v_reg< int, n > &  b 
)
inline

◆ v_pack_u_store() [1/2]

template<int n>
void cv::v_pack_u_store ( uchar ptr,
const v_reg< short, n > &  a 
)
inline

◆ v_pack_u_store() [2/2]

template<int n>
void cv::v_pack_u_store ( ushort ptr,
const v_reg< int, n > &  a 
)
inline

◆ v_popcount()

template<typename _Tp , int n>
v_reg<typename V_TypeTraits<_Tp>::abs_type, n> cv::v_popcount ( const v_reg< _Tp, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Count the 1 bits in the vector lanes and return result as corresponding unsigned type.

Scheme:

{A1 A2 A3 ...} => {popcount(A1), popcount(A2), popcount(A3), ...}

For all integer types.

◆ v_recombine()

template<typename _Tp , int n>
void cv::v_recombine ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b,
v_reg< _Tp, n > &  low,
v_reg< _Tp, n > &  high 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Combine two vectors from lower and higher parts of two other vectors.

low = cv::v_combine_low(a, b);
high = cv::v_combine_high(a, b);

◆ v_reduce_max()

template<typename _Tp , int n>
_Tp cv::v_reduce_max ( const v_reg< _Tp, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Find one max value.

Scheme:

{A1 A2 A3 ...} => max(A1,A2,A3,...)

For all types except 64-bit integer and 64-bit floating point types.

◆ v_reduce_min()

template<typename _Tp , int n>
_Tp cv::v_reduce_min ( const v_reg< _Tp, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Find one min value.

Scheme:

{A1 A2 A3 ...} => min(A1,A2,A3,...)

For all types except 64-bit integer and 64-bit floating point types.

◆ v_reduce_sad()

template<typename _Tp , int n>
V_TypeTraits< typename V_TypeTraits<_Tp>::abs_type >::sum_type cv::v_reduce_sad ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Sum absolute differences of values.

Scheme:

{A1 A2 A3 ...} {B1 B2 B3 ...} => sum{ABS(A1-B1),abs(A2-B2),abs(A3-B3),...}

For all types except 64-bit types.

◆ v_reduce_sum()

template<typename _Tp , int n>
V_TypeTraits<_Tp>::sum_type cv::v_reduce_sum ( const v_reg< _Tp, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Sum packed values.

Scheme:

{A1 A2 A3 ...} => sum{A1,A2,A3,...}

◆ v_reduce_sum4()

template<int n>
v_reg<float, n> cv::v_reduce_sum4 ( const v_reg< float, n > &  a,
const v_reg< float, n > &  b,
const v_reg< float, n > &  c,
const v_reg< float, n > &  d 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Sums all elements of each input vector, returns the vector of sums.

Scheme:

result[0] = a[0] + a[1] + a[2] + a[3]
result[1] = b[0] + b[1] + b[2] + b[3]
result[2] = c[0] + c[1] + c[2] + c[3]
result[3] = d[0] + d[1] + d[2] + d[3]

◆ v_reinterpret_as_f32()

template<typename _Tp0 , int n0>
v_reg< float , n0*sizeof(_Tp0)/sizeof( float )> cv::v_reinterpret_as_f32 ( const v_reg< _Tp0, n0 > &  a)
inline

◆ v_reinterpret_as_f64()

template<typename _Tp0 , int n0>
v_reg< double , n0*sizeof(_Tp0)/sizeof( double )> cv::v_reinterpret_as_f64 ( const v_reg< _Tp0, n0 > &  a)
inline

◆ v_reinterpret_as_s16()

template<typename _Tp0 , int n0>
v_reg< short , n0*sizeof(_Tp0)/sizeof( short )> cv::v_reinterpret_as_s16 ( const v_reg< _Tp0, n0 > &  a)
inline

◆ v_reinterpret_as_s32()

template<typename _Tp0 , int n0>
v_reg< int , n0*sizeof(_Tp0)/sizeof( int )> cv::v_reinterpret_as_s32 ( const v_reg< _Tp0, n0 > &  a)
inline

◆ v_reinterpret_as_s64()

template<typename _Tp0 , int n0>
v_reg< int64 , n0*sizeof(_Tp0)/sizeof( int64 )> cv::v_reinterpret_as_s64 ( const v_reg< _Tp0, n0 > &  a)
inline

◆ v_reinterpret_as_s8()

template<typename _Tp0 , int n0>
v_reg< schar , n0*sizeof(_Tp0)/sizeof( schar )> cv::v_reinterpret_as_s8 ( const v_reg< _Tp0, n0 > &  a)
inline

◆ v_reinterpret_as_u16()

template<typename _Tp0 , int n0>
v_reg< ushort , n0*sizeof(_Tp0)/sizeof( ushort )> cv::v_reinterpret_as_u16 ( const v_reg< _Tp0, n0 > &  a)
inline

◆ v_reinterpret_as_u32()

template<typename _Tp0 , int n0>
v_reg< unsigned , n0*sizeof(_Tp0)/sizeof( unsigned )> cv::v_reinterpret_as_u32 ( const v_reg< _Tp0, n0 > &  a)
inline

◆ v_reinterpret_as_u64()

template<typename _Tp0 , int n0>
v_reg< uint64 , n0*sizeof(_Tp0)/sizeof( uint64 )> cv::v_reinterpret_as_u64 ( const v_reg< _Tp0, n0 > &  a)
inline

◆ v_reinterpret_as_u8()

template<typename _Tp0 , int n0>
v_reg< uchar , n0*sizeof(_Tp0)/sizeof( uchar )> cv::v_reinterpret_as_u8 ( const v_reg< _Tp0, n0 > &  a)
inline

◆ v_reverse()

template<typename _Tp , int n>
v_reg<_Tp, n> cv::v_reverse ( const v_reg< _Tp, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Vector reverse order.

Reverse the order of the vector Scheme:

REG {A1 ... An} ==> REG {An ... A1}

For all types.

◆ v_rotate_left() [1/2]

template<int imm, typename _Tp , int n>
v_reg<_Tp, n> cv::v_rotate_left ( const v_reg< _Tp, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Element shift left among vector.

For all type

◆ v_rotate_left() [2/2]

template<int imm, typename _Tp , int n>
v_reg<_Tp, n> cv::v_rotate_left ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

◆ v_rotate_right() [1/2]

template<int imm, typename _Tp , int n>
v_reg<_Tp, n> cv::v_rotate_right ( const v_reg< _Tp, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Element shift right among vector.

For all type

◆ v_rotate_right() [2/2]

template<int imm, typename _Tp , int n>
v_reg<_Tp, n> cv::v_rotate_right ( const v_reg< _Tp, n > &  a,
const v_reg< _Tp, n > &  b 
)
inline

◆ v_round() [1/3]

template<int n>
v_reg<int, n> cv::v_round ( const v_reg< float, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

Round elements.

Rounds each value. Input type is float vector ==> output type is int vector.

Note
Only for floating point types.

◆ v_round() [2/3]

template<int n>
v_reg<int, n*2> cv::v_round ( const v_reg< double, n > &  a,
const v_reg< double, n > &  b 
)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

This is an overloaded member function, provided for convenience. It differs from the above function only in what argument(s) it accepts.

◆ v_round() [3/3]

template<int n>
v_reg<int, n*2> cv::v_round ( const v_reg< double, n > &  a)
inline

#include <opencv2/core/hal/intrin_cpp.hpp>

This is an overloaded member function, provided for convenience. It differs from the above function only in what argument(s) it accepts.

◆ v_rshr() [1/6]

template<int shift, int n>
v_reg< ushort , n> cv::v_rshr ( const v_reg< ushort, n > &  a)
inline

◆ v_rshr() [2/6]

template<int shift, int n>
v_reg< short , n> cv::v_rshr ( const v_reg< short, n > &  a)
inline

◆ v_rshr() [3/6]

template<int shift, int n>
v_reg< unsigned , n> cv::v_rshr ( const v_reg< unsigned, n > &  a)
inline

◆ v_rshr() [4/6]

template<int shift, int n>
v_reg< int , n> cv::v_rshr ( const v_reg< int, n > &  a)
inline

◆ v_rshr() [5/6]

template<int shift, int n>
v_reg< uint64 , n> cv::v_rshr ( const v_reg< uint64, n > &  a)
inline

◆ v_rshr() [6/6]

template<int shift, int n>
v_reg< int64 , n> cv::v_rshr ( const v_reg< int64, n > &  a)
inline

◆ v_rshr_pack() [1/6]

template<int shift, int n>
v_reg< uchar , 2*n> cv::v_rshr_pack ( const v_reg< ushort, n > &  a,
const v_reg< ushort, n > &  b 
)
inline

◆ v_rshr_pack() [2/6]

template<int shift, int n>
v_reg< schar , 2*n> cv::v_rshr_pack ( const v_reg< short, n > &  a,
const v_reg< short, n > &  b 
)
inline

◆ v_rshr_pack() [3/6]

template<int shift, int n>
v_reg< ushort , 2*n> cv::v_rshr_pack ( const v_reg< unsigned, n > &  a,
const v_reg< unsigned, n > &  b 
)