|
#define | __has_cpp_attribute(__x) 0 |
|
#define | CV_2PI 6.283185307179586476925286766559 |
|
#define | CV_ALWAYS_INLINE inline |
|
#define | CV_CDECL |
|
#define | CV_CMP(a, b) (((a) > (b)) - ((a) < (b))) |
|
#define | CV_CONSTEXPR constexpr |
|
#define | CV_CPU_AVX 10 |
|
#define | CV_CPU_AVX2 11 |
|
#define | CV_CPU_AVX512_CLX 261 |
|
#define | CV_CPU_AVX512_CNL 260 |
|
#define | CV_CPU_AVX512_COMMON 257 |
|
#define | CV_CPU_AVX512_ICL 262 |
|
#define | CV_CPU_AVX512_KNL 258 |
|
#define | CV_CPU_AVX512_KNM 259 |
|
#define | CV_CPU_AVX512_SKX 256 |
|
#define | CV_CPU_AVX_5124FMAPS 27 |
|
#define | CV_CPU_AVX_5124VNNIW 26 |
|
#define | CV_CPU_AVX_512BITALG 24 |
|
#define | CV_CPU_AVX_512BW 14 |
|
#define | CV_CPU_AVX_512CD 15 |
|
#define | CV_CPU_AVX_512DQ 16 |
|
#define | CV_CPU_AVX_512ER 17 |
|
#define | CV_CPU_AVX_512F 13 |
|
#define | CV_CPU_AVX_512IFMA 18 |
|
#define | CV_CPU_AVX_512IFMA512 18 |
|
#define | CV_CPU_AVX_512PF 19 |
|
#define | CV_CPU_AVX_512VBMI 20 |
|
#define | CV_CPU_AVX_512VBMI2 22 |
|
#define | CV_CPU_AVX_512VL 21 |
|
#define | CV_CPU_AVX_512VNNI 23 |
|
#define | CV_CPU_AVX_512VPOPCNTDQ 25 |
|
#define | CV_CPU_FMA3 12 |
|
#define | CV_CPU_FP16 9 |
|
#define | CV_CPU_LASX 231 |
|
#define | CV_CPU_LSX 230 |
|
#define | CV_CPU_MMX 1 |
|
#define | CV_CPU_MSA 150 |
|
#define | CV_CPU_NEON 100 |
|
#define | CV_CPU_NEON_BF16 103 |
|
#define | CV_CPU_NEON_DOTPROD 101 |
|
#define | CV_CPU_NEON_FP16 102 |
|
#define | CV_CPU_NONE 0 |
|
#define | CV_CPU_POPCNT 8 |
|
#define | CV_CPU_RISCVV 170 |
|
#define | CV_CPU_RVV 210 |
|
#define | CV_CPU_SSE 2 |
|
#define | CV_CPU_SSE2 3 |
|
#define | CV_CPU_SSE3 4 |
|
#define | CV_CPU_SSE4_1 6 |
|
#define | CV_CPU_SSE4_2 7 |
|
#define | CV_CPU_SSSE3 5 |
|
#define | CV_CPU_VSX 200 |
|
#define | CV_CPU_VSX3 201 |
|
#define | CV_CXX11 1 |
|
#define | CV_DECL_ALIGNED(x) |
|
#define | CV_ELEM_SIZE(type) (CV_MAT_CN(type)*CV_ELEM_SIZE1(type)) |
|
#define | CV_ELEM_SIZE1(type) ((0x28442211 >> CV_MAT_DEPTH(type)*4) & 15) |
|
#define | CV_ENABLE_UNROLLED 1 |
|
#define | CV_ENUM_CLASS_EXPOSE(EnumType, ...) __CV_EXPAND(__CV_CAT(__CV_ENUM_CLASS_EXPOSE_, __CV_VA_NUM_ARGS(__VA_ARGS__))(EnumType, __VA_ARGS__)); \ |
|
#define | CV_ENUM_FLAGS(EnumType) |
|
#define | CV_EXPORTS_AS(synonym) CV_EXPORTS |
|
#define | CV_EXPORTS_TEMPLATE CV_EXPORTS |
|
#define | CV_EXPORTS_W CV_EXPORTS |
|
#define | CV_EXPORTS_W_MAP CV_EXPORTS |
|
#define | CV_EXPORTS_W_PARAMS CV_EXPORTS |
|
#define | CV_EXPORTS_W_SIMPLE CV_EXPORTS |
|
#define | CV_EXTERN_C extern "C" |
|
#define | CV_FINAL final |
|
#define | CV_FOURCC_MACRO(c1, c2, c3, c4) (((c1) & 255) + (((c2) & 255) << 8) + (((c3) & 255) << 16) + (((c4) & 255) << 24)) |
| Macro to construct the fourcc code of the codec. Same as CV_FOURCC()
|
|
#define | CV_FP16_TYPE 0 |
|
#define | CV_HARDWARE_MAX_FEATURE 512 |
|
#define | CV_IMAX(a, b) ((a) ^ (((a)^(b)) & (((a) > (b)) - 1))) |
|
#define | CV_IMIN(a, b) ((a) ^ (((a)^(b)) & (((a) < (b)) - 1))) |
|
#define | CV_IN_OUT |
|
#define | CV_IS_CONT_MAT CV_IS_MAT_CONT |
|
#define | CV_IS_MAT_CONT(flags) ((flags) & CV_MAT_CONT_FLAG) |
|
#define | CV_IS_SUBMAT(flags) ((flags) & CV_MAT_SUBMAT_FLAG) |
|
#define | CV_LOG2 0.69314718055994530941723212145818 |
|
#define | CV_MAT_CN(flags) ((((flags) & CV_MAT_CN_MASK) >> CV_CN_SHIFT) + 1) |
|
#define | CV_MAT_CN_MASK ((CV_CN_MAX - 1) << CV_CN_SHIFT) |
|
#define | CV_MAT_CONT_FLAG (1 << CV_MAT_CONT_FLAG_SHIFT) |
|
#define | CV_MAT_CONT_FLAG_SHIFT 14 |
|
#define | CV_MAT_TYPE(flags) ((flags) & CV_MAT_TYPE_MASK) |
|
#define | CV_MAT_TYPE_MASK (CV_DEPTH_MAX*CV_CN_MAX - 1) |
|
#define | CV_MAX_DIM 32 |
|
#define | CV_ND |
|
#define | CV_NODISCARD_STD /* nothing by default */ |
|
#define | CV_NOEXCEPT noexcept |
|
#define | CV_OUT |
|
#define | CV_OVERRIDE override |
|
#define | CV_PI 3.1415926535897932384626433832795 |
|
#define | CV_PROP |
|
#define | CV_PROP_RW |
|
#define | CV_SIGN(a) CV_CMP((a),0) |
|
#define | CV_STDCALL |
|
#define | CV_STRONG_ALIGNMENT 0 |
|
#define | CV_SUBMAT_FLAG (1 << CV_SUBMAT_FLAG_SHIFT) |
|
#define | CV_SUBMAT_FLAG_SHIFT 15 |
|
#define | CV_SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t)) |
|
#define | CV_WRAP |
|
#define | CV_WRAP_AS(synonym) |
|
#define | CV_WRAP_DEFAULT(val) |
|
#define | CV_WRAP_FILE_PATH |
|
#define | CV_WRAP_MAPPABLE(mappable) |
|
#define | CV_WRAP_PHANTOM(phantom_header) |
|
#define | MAX(a, b) ((a) < (b) ? (b) : (a)) |
|
#define | MIN(a, b) ((a) > (b) ? (b) : (a)) |
|
#define | OPENCV_ABI_COMPATIBILITY 400 |
|
|
enum | CpuFeatures {
CPU_MMX = 1
,
CPU_SSE = 2
,
CPU_SSE2 = 3
,
CPU_SSE3 = 4
,
CPU_SSSE3 = 5
,
CPU_SSE4_1 = 6
,
CPU_SSE4_2 = 7
,
CPU_POPCNT = 8
,
CPU_FP16 = 9
,
CPU_AVX = 10
,
CPU_AVX2 = 11
,
CPU_FMA3 = 12
,
CPU_AVX_512F = 13
,
CPU_AVX_512BW = 14
,
CPU_AVX_512CD = 15
,
CPU_AVX_512DQ = 16
,
CPU_AVX_512ER = 17
,
CPU_AVX_512IFMA512 = 18
,
CPU_AVX_512IFMA = 18
,
CPU_AVX_512PF = 19
,
CPU_AVX_512VBMI = 20
,
CPU_AVX_512VL = 21
,
CPU_AVX_512VBMI2 = 22
,
CPU_AVX_512VNNI = 23
,
CPU_AVX_512BITALG = 24
,
CPU_AVX_512VPOPCNTDQ = 25
,
CPU_AVX_5124VNNIW = 26
,
CPU_AVX_5124FMAPS = 27
,
CPU_NEON = 100
,
CPU_NEON_DOTPROD = 101
,
CPU_NEON_FP16 = 102
,
CPU_NEON_BF16 = 103
,
CPU_MSA = 150
,
CPU_RISCVV = 170
,
CPU_VSX = 200
,
CPU_VSX3 = 201
,
CPU_RVV = 210
,
CPU_LSX = 230
,
CPU_LASX = 231
,
CPU_AVX512_SKX = 256
,
CPU_AVX512_COMMON = 257
,
CPU_AVX512_KNL = 258
,
CPU_AVX512_KNM = 259
,
CPU_AVX512_CNL = 260
,
CPU_AVX512_CLX = 261
,
CPU_AVX512_ICL = 262
,
CPU_MAX_FEATURE = 512
} |
| Available CPU features. More...
|
|