OpenCV
3.2.0
Open Source Computer Vision
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Classes | |
struct | Cv16suf::_fp16Format |
struct | Cv32suf::_fp32Format |
union | Cv16suf |
union | Cv32suf |
union | Cv64suf |
Macros | |
#define | CV_2PI 6.283185307179586476925286766559 |
#define | CV_AVX 0 |
#define | CV_AVX2 0 |
#define | CV_AVX_512BW 0 |
#define | CV_AVX_512CD 0 |
#define | CV_AVX_512DQ 0 |
#define | CV_AVX_512ER 0 |
#define | CV_AVX_512F 0 |
#define | CV_AVX_512IFMA512 0 |
#define | CV_AVX_512PF 0 |
#define | CV_AVX_512VBMI 0 |
#define | CV_AVX_512VL 0 |
#define | CV_CPU_AVX 10 |
#define | CV_CPU_AVX2 11 |
#define | CV_CPU_AVX_512BW 14 |
#define | CV_CPU_AVX_512CD 15 |
#define | CV_CPU_AVX_512DQ 16 |
#define | CV_CPU_AVX_512ER 17 |
#define | CV_CPU_AVX_512F 13 |
#define | CV_CPU_AVX_512IFMA512 18 |
#define | CV_CPU_AVX_512PF 19 |
#define | CV_CPU_AVX_512VBMI 20 |
#define | CV_CPU_AVX_512VL 21 |
#define | CV_CPU_FMA3 12 |
#define | CV_CPU_FP16 9 |
#define | CV_CPU_MMX 1 |
#define | CV_CPU_NEON 100 |
#define | CV_CPU_NONE 0 |
#define | CV_CPU_POPCNT 8 |
#define | CV_CPU_SSE 2 |
#define | CV_CPU_SSE2 3 |
#define | CV_CPU_SSE3 4 |
#define | CV_CPU_SSE4_1 6 |
#define | CV_CPU_SSE4_2 7 |
#define | CV_CPU_SSSE3 5 |
#define | CV_DECL_ALIGNED(x) |
#define | CV_ELEM_SIZE(type) (CV_MAT_CN(type) << ((((sizeof(size_t)/4+1)*16384|0x3a50) >> CV_MAT_DEPTH(type)*2) & 3)) |
#define | CV_ELEM_SIZE1(type) ((((sizeof(size_t)<<28)|0x8442211) >> CV_MAT_DEPTH(type)*4) & 15) |
#define | CV_ENABLE_UNROLLED 1 |
#define | CV_EXPORTS |
#define | CV_EXPORTS_AS(synonym) CV_EXPORTS |
#define | CV_EXPORTS_W CV_EXPORTS |
#define | CV_EXPORTS_W_MAP CV_EXPORTS |
#define | CV_EXPORTS_W_SIMPLE CV_EXPORTS |
#define | CV_EXTERN_C extern "C" |
#define | CV_FMA3 0 |
#define | CV_FP16_TYPE 0 |
#define | CV_HARDWARE_MAX_FEATURE 255 |
#define | CV_IN_OUT |
#define | CV_IS_CONT_MAT CV_IS_MAT_CONT |
#define | CV_IS_MAT_CONT(flags) ((flags) & CV_MAT_CONT_FLAG) |
#define | CV_IS_SUBMAT(flags) ((flags) & CV_MAT_SUBMAT_FLAG) |
#define | CV_LOG2 0.69314718055994530941723212145818 |
#define | CV_MAT_CN(flags) ((((flags) & CV_MAT_CN_MASK) >> CV_CN_SHIFT) + 1) |
#define | CV_MAT_CN_MASK ((CV_CN_MAX - 1) << CV_CN_SHIFT) |
#define | CV_MAT_CONT_FLAG (1 << CV_MAT_CONT_FLAG_SHIFT) |
#define | CV_MAT_CONT_FLAG_SHIFT 14 |
#define | CV_MAT_TYPE(flags) ((flags) & CV_MAT_TYPE_MASK) |
#define | CV_MAT_TYPE_MASK (CV_DEPTH_MAX*CV_CN_MAX - 1) |
#define | CV_MMX 0 |
#define | CV_OUT |
#define | CV_PI 3.1415926535897932384626433832795 |
#define | CV_POPCNT 0 |
#define | CV_PROP |
#define | CV_PROP_RW |
#define | CV_SSE 0 |
#define | CV_SSE3 0 |
#define | CV_SSE4_1 0 |
#define | CV_SSE4_2 0 |
#define | CV_SSSE3 0 |
#define | CV_SUBMAT_FLAG (1 << CV_SUBMAT_FLAG_SHIFT) |
#define | CV_SUBMAT_FLAG_SHIFT 15 |
#define | CV_VFP 0 |
#define | CV_WRAP |
#define | CV_WRAP_AS(synonym) |
#define | MAX(a, b) ((a) < (b) ? (b) : (a)) |
#define | MIN(a, b) ((a) > (b) ? (b) : (a)) |
#define | OPENCV_ABI_COMPATIBILITY 300 |
Enumerations | |
enum | CpuFeatures { CPU_MMX = 1, CPU_SSE = 2, CPU_SSE2 = 3, CPU_SSE3 = 4, CPU_SSSE3 = 5, CPU_SSE4_1 = 6, CPU_SSE4_2 = 7, CPU_POPCNT = 8, CPU_FP16 = 9, CPU_AVX = 10, CPU_AVX2 = 11, CPU_FMA3 = 12, CPU_AVX_512F = 13, CPU_AVX_512BW = 14, CPU_AVX_512CD = 15, CPU_AVX_512DQ = 16, CPU_AVX_512ER = 17, CPU_AVX_512IFMA512 = 18, CPU_AVX_512PF = 19, CPU_AVX_512VBMI = 20, CPU_AVX_512VL = 21, CPU_NEON = 100 } |
Available CPU features. More... | |
Functions | |
CV_XADD (int *addr, int delta) | |